Multi-Gate Hybrid Fin Isolation for Tight CPP Scaling
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Solution Overview
Problem
Existing semiconductor manufacturing processes face challenges in scaling down cell height and contacted poly pitch (CPP) due to poor pattern alignment and degraded critical dimension uniformity, limiting the advancement of multi-gate devices like FinFETs and GAA transistors.
Innovation Solution
A self-aligned active region and metal gate isolation scheme is implemented, utilizing a dielectric layer and dielectric hybrid fins with a high-κ top portion for improved alignment and isolation, allowing for reduced cell height and CPP, enhancing device density and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography process is used to define cut metal gate region, then pattern alignment is achieved, but overlay control is poor and critical dimension uniformity is degraded
Solution Approach 1:
The patent uses self-aligned processes where the metal gate isolation regions are formed by etching through the gate electrode using the gate structure itself as the alignment reference. This preliminary alignment action eliminates the need for subsequent photolithography alignment steps, thereby improving both overlay control and critical dimension uniformity.
Solution Approach 2:
The gate structure serves as its own alignment reference for defining the metal gate isolation regions. The self-aligned etching process uses the gate electrode's physical structure to automatically define the isolation region boundaries, eliminating external alignment dependencies and improving manufacturing precision.
2Manufacturing precision
If photolithography process is used for active region isolation, then isolation is achieved, but device scaling is limited
Solution Approach 1:
The active region isolation is formed through self-aligned etching processes that use the gate structure and previously formed features as alignment references. This preliminary self-alignment enables tighter isolation features to be formed without compromising alignment accuracy, allowing further device scaling.
Solution Approach 2:
The patent employs advanced etching parameters and selective etch processes that enable the formation of smaller isolation features. By changing the etching selectivity and using multiple etch steps with different conditions, the process achieves high-quality isolation at reduced dimensions, enabling continued device scaling.
3Quantity of substance
If cell height and CPP are reduced for scaling, then device density is improved, but alignment precision and critical dimension uniformity are degraded
Solution Approach 1:
The self-aligned metal gate isolation and active region isolation processes use the device's own structural features as alignment references, eliminating external alignment errors. This self-service alignment mechanism maintains high precision even when feature dimensions are reduced for increased device density.
Solution Approach 2:
The patent performs alignment-critical steps early in the process using self-aligned etching, before subsequent processing steps. This preliminary self-alignment establishes precise feature locations that are maintained through subsequent fabrication steps, enabling reduced cell height and CPP while maintaining critical dimension uniformity.
Data Source
AI summary
A method of fabricating a device includes forming a dummy gate over a plurality of fins. Thereafter, a first portion of the dummy gate is removed to form a first trench that exposes a first hybrid fin and a first part of a second hybrid fin. The method further includes filling the first trench with a dielectric material disposed over the first hybrid fin and over the first part of the second hybrid fin. Thereafter, a second portion of the dummy gate is removed to form a second trench and the second trench is filled with a metal layer. The method further includes etching-back the metal layer, where a first plane defined by a first top surface of the metal layer is disposed beneath a second plane defined by a second top surface of a second part of the second hybrid fin after the etching-back the metal layer.