Multi-gate FinFETs with Segmented Crystal Orientations
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Solution Overview
Problem
The integration of multi-gate pMOSFET and nMOSFET on a single wafer is challenging due to differences in carrier mobility along different crystal directions in silicon, leading to suboptimal channel orientation and increased manufacturing complexity, which affects the mobility of electrons and holes.
Innovation Solution
A method involving a substrate with multiple semiconductor layers having different carrier mobility enhancing parameters, such as crystalline orientations or semiconductor materials, to optimize the geometry and material choice of fins in multi-gate devices, allowing for enhanced mobility of both p-type and n-type transistors without degrading the other's performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multi-gate pMOSFET and nMOSFET are integrated on a single wafer with parallel orientation, then device integration is achieved, but carrier mobility is insufficient for one or both device types
Solution Approach 1:
The wafer is divided into first and second regions with different crystal orientations. The first region has a first crystal orientation optimized for nMOSFET carrier mobility, while the second region has a second crystal orientation optimized for pMOSFET carrier mobility. This segmentation allows each device type to have optimal mobility characteristics while maintaining integration on a single wafer.
Solution Approach 2:
Different crystal orientations are assigned to different regions of the wafer. The first region has a first crystal orientation that provides optimal electron mobility for nMOSFETs, while the second region has a second crystal orientation that provides optimal hole mobility for pMOSFETs. This local differentiation of crystal quality enables both device types to achieve optimal performance in their respective regions.
2Reliability
If different crystal orientations are used for nMOSFET and pMOSFET fins, then carrier mobility is optimized, but layout efficiency decreases and manufacturing complexity increases
Solution Approach 1:
The wafer is divided into first and second regions with different crystal orientations. The first region has a first crystal orientation optimized for nMOSFET carrier mobility, while the second region has a second crystal orientation optimized for pMOSFET carrier mobility. This segmentation allows each device type to have optimal mobility characteristics while maintaining integration on a single wafer.
Solution Approach 2:
Instead of varying fin orientation within a single planar region, the solution moves to a dimensional approach by dividing the wafer into separate regions with different crystal orientations. This allows optimal mobility for both device types without requiring complex fin geometry variations, simplifying the overall layout while maintaining performance.
Data Source
AI summary
A multi-gate device is disclosed. In one aspect, the device includes a substrate having a first semiconductor layer of a first carrier mobility enhancing parameter, a buried insulating layer, and a second semiconductor layer with a second carrier mobility enhancing parameter. The device also includes a first active region electrically isolated from a second active region in the substrate. The first active region has a first fin grown on the first semiconductor layer and having the first mobility enhancing parameter. The second active region has a second fin grown on the second semiconductor layer and having the second mobility enhancing parameter. The device also includes a dielectric layer over the second semiconductor layer which is located between the first fin and the second fin. The first and second fins protrude through and above the dielectric layer.