Multi-Gate Semiconductor Structure for Stable GAA Channel Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional gate-all-around (GAA) transistor manufacturing methods face challenges such as epitaxial loss in the source/drain region, variation of channel lengths, and weak regions of gate electrodes, especially as device size is scaled down, leading to inadequate control and performance issues.
Innovation Solution
A method involving a metal gate-first process that forms metal gate electrodes without work function shifting, eliminates epitaxial loss, and reduces channel length variation by forming gate structures that wrap around semiconductor layers, with inner spacers and rare earth metal oxide layers to stabilize the gate electrodes, ensuring strong control over the channel regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional GAA device manufacturing methods are used, then gate control is improved by increasing gate-channel coupling, but epitaxial loss occurs in the source/drain region and channel length variation increases
Solution Approach 1:
The gate structure is formed before the source/drain regions through a gate-first process. Dummy gates are formed initially, then real gates are created, and only afterward are the source/drain regions formed. This preliminary formation of the gate structure allows precise definition of channel length before any epitaxial growth or source/drain formation occurs, eliminating channel length variation caused by subsequent processing steps.
Solution Approach 2:
Inner spacers are introduced as intermediary structures between the gate electrode and source/drain regions. These inner spacers act as placeholders that define the final channel length and prevent epitaxial material from encroaching on the gate region. The inner spacers are formed after the gate structure and before the source/drain regions, serving as a mediator that resolves the conflict between achieving good gate control and maintaining precise channel length.
2Productivity
If device size is scaled down to increase functional density, then production efficiency is improved and costs are lowered, but gate work function shifting occurs and short-channel effects increase
Solution Approach 1:
The gate electrode is constructed as a composite structure with multiple material layers including a work function metal layer (such as titanium nitride or tantalum nitride), a barrier metal layer, and a fill metal layer. This composite structure allows precise control of the gate work function while maintaining stability during scaling. The different material layers serve distinct functions: the work function metal sets the threshold voltage, the barrier layer prevents diffusion, and the fill layer provides mechanical support and stress control.
Solution Approach 2:
Different regions of the gate structure are assigned different material compositions and properties. The work function metal layer is selectively placed in contact with the semiconductor channel to control electrical properties, while other layers are positioned to provide mechanical support or prevent interdiffusion. This local differentiation of material quality allows the gate to maintain stable work function characteristics even as overall device dimensions are reduced.
3Reliability
If conventional GAA manufacturing processes are used, then gate-all-around structure is achieved, but weak regions form in the gate electrodes and corner turn-on issues occur
Solution Approach 1:
The gate structure extends in multiple dimensions to completely surround the channel region, forming a three-dimensional gate-all-around configuration. The gate electrode wraps around the channel from top, bottom, and sidewalls, providing control from all directions. This multi-dimensional approach strengthens the overall gate control while distributing mechanical stresses across multiple surfaces rather than concentrating them at corners.
Solution Approach 2:
The gate structure is nested within a multi-layer composition with the work function metal layer nested within the gate electrode, which is itself nested within the gate dielectric layer, which is nested within the semiconductor structure. The inner spacers are nested between the gate and source/drain regions. This nested arrangement provides structural support at each level, preventing weak regions from forming in any single layer while maintaining the gate-all-around control geometry.
Data Source
AI summary
The present disclosure provides a method that includes forming a stack including first and second semiconductor layers over a semiconductor substrate, the first and second semiconductor layers having different material compositions and alternating with one another within the stack; forming a dummy gate structure over the stack, the dummy gate structure wrapping around top and sidewall surfaces of the stack; forming a gate spacer on sidewalls of the dummy gate structure and disposed on the top of the stack; forming a dielectric layer with the dummy gate embedded therein; removing the dummy gate structure, resulting in a gate trench; removing the second semiconductor layers through the gate trench such that the first semiconductor layers form semiconductor sheets; forming a metal gate wrapping around the semiconductor sheets; and thereafter, forming a source/drain feature adjacent the metal gate and connecting to the semiconductor sheets.