Multigate Device Isolation Using Carbon-Doped Etch Stops
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Solution Overview
Problem
Current multigate devices fabricated on bulk semiconductor substrates face challenges in controlling current leakage beneath the channel region and at source/drain junctions, leading to inconsistent fin heights and electrical properties due to difficulties in removing semiconductor material and depositing dielectric material.
Innovation Solution
The method involves forming a fin on a semiconductor substrate with a carbon-doped semiconductor layer, removing semiconductor material beneath the fin to create a void, and depositing dielectric material to isolate the fin, using carbon-doped layers to protect the fin and substrate during etching, ensuring consistent fin height and dielectric deposition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If semiconductor material is removed beneath the fin to deposit dielectric material for isolation, then current leakage is reduced, but fin height consistency deteriorates due to difficult material removal
Solution Approach 1:
A carbon-doped semiconductor layer is formed beneath the fin structure before any etching or dielectric deposition occurs. This preliminary layer serves as an etch stop that prevents excessive removal of semiconductor material during subsequent processing, thereby maintaining fin height consistency while still allowing dielectric material to be deposited in the void for current leakage isolation.
Solution Approach 2:
The carbon-doped semiconductor layer acts as an intermediary between the fin structure and the bulk substrate. It provides a controlled interface that allows selective etching to create voids for dielectric isolation while protecting the fin height from excessive removal, thus mediating between the conflicting requirements of leakage isolation and height precision.
2Reliability
If dielectric material is deposited to isolate the fin, then current leakage is reduced, but device complexity increases due to additional processing steps
Solution Approach 1:
The carbon-doped semiconductor layer is integrated into the existing fin formation process, combining the etch stop function with the structural support function. This merging of functions into a single layer reduces the number of separate processing steps needed compared to using separate etch stop layers and structural layers.
Solution Approach 2:
The carbon-doped semiconductor layer performs multiple functions simultaneously: it serves as an etch stop to control fin height, provides structural support during void formation, and enables subsequent dielectric deposition for isolation. This multi-functionality reduces overall process complexity by eliminating the need for multiple specialized layers.
3Manufacturing precision
If carbon-doped layer is used to protect fin during etching, then fin height consistency is maintained, but manufacturing complexity increases
Solution Approach 1:
The carbon doping concentration and depth are optimized to provide sufficient etch stop protection while maintaining compatibility with standard fin formation processes. By adjusting these parameters, the layer provides the needed protection without requiring extreme or non-standard processing conditions, thus maintaining ease of manufacture.
Solution Approach 2:
The carbon-doped semiconductor layer creates a composite structure within the semiconductor material itself, combining the base semiconductor properties with carbon doping to achieve enhanced etch resistance. This composite approach maintains electrical functionality while adding the protective property, avoiding the need for separate protective coating layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively isolates the multigate device fins, reducing current leakage and maintaining consistent fin heights, thereby improving the electrical properties and reliability of the devices.
Implementation Method 1
the carbon-doped semiconductor layer prevents the etching from removing at least a portion of the fin
Implementation Method 2
A dielectric material is deposited in the void to isolate the fin from a second portion of semiconductor material that is below the void
Data Source
AI summary
Methods and systems for forming multigate devices and systems are disclosed. In accordance with one such method, a fin is formed on a semiconductor substrate including a carbon-doped semiconductor layer. Further, a first portion of semiconductor material that is beneath the fin is removed to form a void beneath the fin by etching the material such that the fin is supported by at least one supporting pillar of the semiconducting material and such that the carbon-doped semiconductor layer prevents the etching from removing at least a portion of the fin. A dielectric material is deposited in the void to isolate the fin from a second portion of semiconductor material that is below the void. In addition, source and drain regions are formed in the fin and a gate structure is formed over the fin to fabricate the multigate device such that the dielectric material reduces current leakage beneath the device.