Multi-Gate Semiconductor Device with Conformal Barrier Layer
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Solution Overview
Problem
In semiconductor device fabrication, the long gate channel region is susceptible to etch loading effects when simultaneously etching the narrow gate channel region, leading to non-uniform gate stacks, which requires an additional masking layer to protect the long gate channel region.
Innovation Solution
A method of fabricating multi-gate semiconductor devices involves forming gate voids with varying lengths, depositing a gate dielectric layer and work function metal layers, and forming metal gate stacks with a barrier layer interposed between the metal gate stacks and the gate dielectric layer, eliminating the need for an additional masking layer by using a conformal barrier layer to protect the gate dielectric during etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If simultaneous etching of narrow and long gate channel regions is performed, then productivity is improved, but manufacturing precision deteriorates due to etch loading effects causing non-uniform gate stacks
Solution Approach 1:
A conformal barrier layer is deposited over the gate dielectric layer before etching the metal gate stacks. This preliminary protective action prevents etch loading effects from damaging the gate dielectric in long channel regions, enabling simultaneous etching of both narrow and long gate channels without compromising gate stack uniformity
Solution Approach 2:
The conformal barrier layer acts as an intermediary protective layer between the etching process and the gate dielectric layer. It selectively protects the gate dielectric during metal gate stack etching, allowing the etch process to proceed uniformly across both narrow and long gate channel regions without direct etch damage to the dielectric
2Manufacturing precision
If an additional masking layer is used to protect long gate channel region, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The conformal barrier layer is integrated into the existing gate stack structure as a protective layer, eliminating the need for separate masking layers. This extraction of the protective function from the masking process reduces fabrication complexity while maintaining gate stack uniformity
Solution Approach 2:
The conformal barrier layer serves multiple functions: it protects the gate dielectric during etching, provides a uniform interface for metal gate stack formation, and enables simultaneous processing of different gate channel lengths. This multi-functionality replaces the need for additional masking layers
Data Source
AI summary
A multi-channel semiconductor device includes a first and second gate channels formed in a semiconductor substrate. The first gate channel has a first length and the second gate channel has a second length greater than the first length. A gate dielectric layer is formed in the first and second gate channels. A first plurality of work function metal layers is formed on the gate dielectric layer of the first gate channel. A second plurality of work function metal layers is formed on the gate dielectric layer of the second gate channel. A barrier layer is formed on each of the first and second plurality of work function metal layers, and the gate dielectric layer. The multi-channel semiconductor device further includes metal gate stacks formed on of the barrier layer such that the barrier layer is interposed between the metal gate stacks and the gate dielectric layer.