Multi-Gate Source/Drain Silicide Layout for Lower Contact Resistance
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Solution Overview
Problem
As multi-gate devices shrink, the contact area between the source/drain feature and the silicide layer decreases, making it challenging to reduce parasitic resistance effectively in existing multi-gate devices.
Innovation Solution
A method is introduced to form a dummy layer around the source/drain feature, which is later replaced by a silicide layer on multiple sides, increasing the contact area and reducing resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multi-gate devices are scaled down to smaller dimensions, then production efficiency increases and costs decrease, but contact area between source/drain feature and silicide layer shrinks causing parasitic resistance to increase
Solution Approach 1:
The patent transitions from planar contact geometry to three-dimensional contact geometry by forming silicide layers on the sidewalls and top surface of source/drain features. This dimensional change allows the contact area to scale with device size without proportionally increasing parasitic resistance, as the silicide contacts the channel region from multiple spatial dimensions rather than just one plane.
Solution Approach 2:
The silicide layer is formed to wrap around and enclose portions of the source/drain feature, creating a nested structure where the silicide contacts the channel from multiple sides. This nested configuration maximizes the contact interface area within the constrained lateral dimensions of scaled-down devices, effectively increasing the conductive pathway without expanding the device footprint.
2Length of moving object
If multi-gate devices are scaled down, then geometry size decreases, but contact area shrinks making it challenging to reduce parasitic resistance
Solution Approach 1:
The silicide layer is formed on the source/drain features before final contact hole formation and metallization steps. This preliminary silicidation ensures that the contact area is established and optimized at an earlier stage in the fabrication process, allowing subsequent steps to proceed without compromising the contact interface. The silicide layer serves as a pre-formed contact structure that maintains its integrity through subsequent processing.
3Device complexity
If existing multi-gate device structures are used, then fabrication process remains simple, but contact resistance remains high due to limited contact area
Solution Approach 1:
The silicide layer acts as an intermediary material between the source/drain feature and the overlying contact metallization. This intermediate silicide layer provides a low-resistance contact interface that mediates the electrical connection, reducing parasitic resistance without requiring fundamental changes to the overall device architecture or fabrication flow.
Data Source
AI summary
Semiconductor devices and methods of forming the same are provided. In an embodiment, an exemplary semiconductor device includes a vertical stack of channel members disposed over a substrate, a gate structure wrapping around each channel member of the vertical stack of channel members, a source/drain feature electrically coupled to the vertical stack of channel members, a silicide layer formed on more than one side of the source/drain feature, and a source/drain contact electrically coupled to the source/drain feature via the silicide layer.