Multi-Gate Source/Drain Epitaxy for Low Leakage and Contact Resistance
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Solution Overview
Problem
Conventional epitaxial features in multi-gate MOSFETs, such as MBC transistors, are inadequate in reducing leakage, capacitance, and resistance, leading to increased complexity and inefficiency in semiconductor manufacturing.
Innovation Solution
The development of source/drain features in MBC transistors with a shielding epitaxial layer covering undoped semiconductor features and sidewalls, followed by a heavily doped epitaxial layer, and a capping epitaxial layer to prevent dopant diffusion and reduce void formation, thereby enhancing the performance of multi-gate devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional epitaxial features are used in multi-gate devices, then the device structure is simpler, but leakage current increases and resistance is not sufficiently reduced
Solution Approach 1:
The source/drain region is divided into multiple epitaxial layers with distinct functions: an undoped semiconductor layer for low resistance, a first doped epitaxial layer for leakage reduction, and a second doped epitaxial layer for additional leakage control. This segmentation allows each layer to address specific performance requirements independently, achieving superior electrical characteristics while maintaining manageable structural complexity.
Solution Approach 2:
Different regions of the source/drain structure are assigned different doping concentrations and material compositions to optimize local electrical properties. The undoped region provides low resistance pathways, while doped regions provide leakage control, creating a spatially varying quality profile that simultaneously addresses both resistance and leakage current requirements.
2Manufacturing precision
If conventional epitaxial features are used, then manufacturing process is simpler, but contact resistance increases
Solution Approach 1:
The undoped semiconductor layer is formed first as a foundation layer with optimal crystalline structure and low defect density, providing an ideal base for subsequent doped layers. This preliminary action ensures that the final contact region has minimal resistance while maintaining structural integrity throughout the multi-layer epitaxial process.
Solution Approach 2:
The source/drain structure employs a composite of multiple semiconductor layers with different doping states (undoped, lightly doped, heavily doped) and potentially different material compositions. This composite structure combines the advantages of each layer type to achieve low contact resistance while managing manufacturing complexity through standardized epitaxial growth techniques.
3Reliability
If shielding epitaxial layers are added to cover undoped semiconductor features, then leakage and resistance are reduced, but device structure becomes more complex
Solution Approach 1:
Multiple functional requirements (leakage reduction, resistance control, structural support) are merged into a single integrated multi-layer epitaxial structure. The undoped layer, first doped layer, and second doped layer work together as a unified source/drain region, achieving superior device performance while avoiding the need for separate discrete components or additional processing steps.
Solution Approach 2:
The epitaxial structure utilizes controlled changes in doping concentration and material composition across different layers to achieve the desired electrical characteristics. By varying these parameters systematically through the layer stack, the structure achieves low resistance and leakage control simultaneously, managing complexity through parameter optimization rather than structural multiplication.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces void formation and contact resistance, improving the performance and reliability of multi-gate devices by minimizing leakage and resistance, thus enhancing manufacturing efficiency.
Implementation Method 1
selectively depositing a first epitaxial layer on sidewalls of the plurality of channel layer and the undoped semiconductor feature
Data Source
AI summary
Methods and semiconductor structures are provided. A method according to the present disclosure includes forming, over a substrate, a fin-shaped structure that includes a plurality of channel layers interleaved by a plurality of sacrificial layers, recessing a source/drain region of the fin-shaped structure to form a source/drain recess that extends into the substrate and exposes a portion of the substrate, selectively and partially recessing sidewalls of the plurality of sacrificial layers to form inner spacer recesses, forming inner spacers in the inner spacer recesses, selectively forming a buffer semiconductor layer on the exposed portion of the substrate, selectively depositing a first epitaxial layer on sidewalls of the plurality of channel layer and the buffer semiconductor layer such that a top surface of the buffer semiconductor layer is completely covered by the first epitaxial layer, and depositing a second epitaxial layer over the first epitaxial layer and the inner spacers.