Multi-Gate TFT Edge Compensation for LCD Channel Margin
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Solution Overview
Problem
The existing manufacturing processes for LCD devices with multi-gate structures face challenges in maintaining a sufficient margin between the channel width and length of thin film transistors, leading to reduced driving performance and increased manufacturing costs due to light leakage currents and complex mask processes.
Innovation Solution
The implementation of a multi-pattern gate electrode structure with compensation patterns to correct pattern distortion, allowing for straight edges and square corners, which increases the margin between channel width and length, and the use of Low Temperature Poly Silicon (LTPS) as a material to enhance driving performance, while eliminating the need for a separate light shield layer and reducing mask processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional single-gate TFT structure is used, then the manufacturing process is simpler, but the channel width to length ratio margin is insufficient and light leakage currents occur
Solution Approach 1:
The gate electrode is divided into multiple gates (first gate, second gate, third gate, fourth gate) arranged in a multi-gate structure around the active layer. This segmentation allows independent control of different gate regions, enabling precise adjustment of the channel width to length ratio margin while maintaining manufacturing feasibility through systematic patterning processes.
Solution Approach 2:
The patent transitions from a conventional single-gate planar structure to a multi-gate three-dimensional configuration where gates are positioned at different locations (top, bottom, left, right) relative to the active layer. This dimensional change enables superior control over the channel width to length ratio margin and effectively blocks light leakage paths that cannot be addressed by planar structures alone.
2Object-affected harmful factors
If a light shield layer is added to prevent light leakage, then light leakage currents are reduced, but the number of mask processes increases and manufacturing cost increases
Solution Approach 1:
The patent removes the separate light shield layer from the conventional TFT structure and replaces it with a multi-gate electrode configuration that inherently prevents light leakage through its geometric arrangement. This extraction eliminates the need for additional mask processes associated with light shield layer formation while maintaining effective light leakage prevention.
Solution Approach 2:
The multi-gate electrode structure performs multiple functions simultaneously: it controls the transistor switching operation, adjusts the channel width to length ratio margin, and prevents light leakage currents. This multi-functionality consolidates what would traditionally require separate components (gate electrodes and light shield layer) into a single integrated structure, reducing manufacturing complexity.
3Reliability
If the channel width to length ratio is increased to improve driving performance, then driving performance is enhanced, but the margin for manufacturing precision is reduced
Solution Approach 1:
The patent applies different gate configurations to different local regions of the active layer. By positioning multiple gates at specific locations around the active layer, each gate region can be optimized independently to contribute to the overall channel width to length ratio margin, allowing high driving performance while maintaining sufficient manufacturing precision margin.
Solution Approach 2:
The multi-gate structure enables independent adjustment of electrical parameters (gate voltages, gate widths, gate spacing) to optimize the channel width to length ratio. This parameter flexibility allows the design to achieve enhanced driving performance while maintaining an adequate margin for manufacturing precision, as the electrical characteristics can be tuned without proportionally increasing the physical dimensions.
Data Source
AI summary
Disclosed is LCD device and a method of manufacturing the same, which increases a margin between the channel width and length (W/L) of a thin film transistor having a multi-gate structure, wherein the device comprises a substrate where a plurality of pixel regions are defined by a data line and a gate line; an active layer formed at each of a plurality of pixel regions of the substrate; a gate electrode comprising a plurality of multi-patterns overlapping with the active layer with an insulation layer therebetween; and a data electrode electrically connected to the active layer, wherein the multi-patterns are formed in straight by compensating pattern distortion of an edge portion of a gate pattern, and formed with the gate pattern which is designed to comprise a plurality of compensation patterns.