Multiheight Conductive Via Contacts for 3D NAND Interconnects
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods for forming multilevel interconnect structures in semiconductor devices face challenges in achieving high density and minimal processing complexity while ensuring accurate location and cross-sectional dimensions of contact openings, particularly in three-dimensional NAND memory devices with stacked wiring levels.
Innovation Solution
The method involves creating a stack of alternating sacrificial layers and insulating layers over a substrate, using a contact mask and multiple over masks to form contact openings of varying depths, and depositing electrically conductive via contacts that are self-aligned with specific word lines, with an insulating liner for electrical isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional methods are used to form multilevel interconnect structures, then processing complexity increases, but manufacturing precision and contact opening accuracy deteriorate
Solution Approach 1:
The patent divides the contact formation process into multiple etching stages, each creating contact openings of different depths. First contact openings are formed to a first depth, then second contact openings are formed to a greater second depth. This segmentation allows precise control over contact opening dimensions and depths without increasing overall processing complexity, as each stage uses standard etching equipment and procedures.
Solution Approach 2:
The patent performs preliminary actions by forming the first contact openings and depositing first filler material before forming the second contact openings. This preliminary formation of shallower contacts and their filler material provides a foundation for the subsequent deeper contact formation, ensuring that each contact opening is precisely defined before the next etching stage begins, thereby maintaining high manufacturing precision throughout the process.
2Quantity of substance
If contact openings are formed to different depths to reach different word lines, then wiring density increases, but device complexity increases
Solution Approach 1:
The patent employs a universal multi-layer interconnect structure where the same basic components (conductive plugs, conductive barriers, insulator layers, and word line layers) serve multiple functions across different contact depths. The first and second contact openings both use the same etching and filling processes, and the insulator layers provide both electrical isolation and structural support throughout the stack. This multi-functionality increases wiring density without proportionally increasing device complexity.
Solution Approach 2:
The patent implements a nested structure where second contact openings are formed within the same vertical stack that contains first contact openings, with the second contacts extending deeper to reach lower word lines. The first filler material is deposited in the first contact openings, and then the second filler material is deposited in the second contact openings, creating a nested arrangement of conductive elements at different depths within a unified interconnect architecture, thereby achieving high wiring density with controlled complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of high-density multilevel interconnect structures with precise contact openings and electrical isolation, facilitating the fabrication of advanced semiconductor devices like three-dimensional NAND memory arrays with reduced processing complexity and cost.
Implementation Method 1
The insulating liner isolates each of the first plurality of electrically conductive via contacts from all the word lines in the stack through which each electrically conductive via contact extends, except a respective one of the plurality of word lines whose upper surface is contacted by the respective electrically conductive via contact
Data Source
AI summary
A method of making multi-level contacts includes providing an in-process multilevel device having a device region and a contact region including a stack of a plurality of alternating sacrificial layers and insulator layers located over a major surface of a substrate. A contact mask with at least one contact mask opening and at least one first terrace mask opening is provided over the stack, where the at least one first terrace mask opening is larger than the at least one contact mask opening. At least one first contact opening and at least one first terrace opening are simultaneously formed extending substantially perpendicular to the major surface of the substrate through the stack to a first sacrificial layer by etching a portion of the stack through the at least one contact mask opening and the at least one first terrace mask opening. A first electrically conductive via contact is deposited in the at least one first contact opening.