Multilane Serial Bus Early Frame Termination
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Solution Overview
Problem
Current serial bus technologies, such as I2C and I3C, face limitations in data communication throughput as demand for speed increases, particularly in complex applications, leading to strained capacity and latency issues due to the need for multilane implementations that introduce padding and increase latency.
Innovation Solution
The proposed solution involves a dynamic bus width expansion method for multilane serial buses, allowing for early termination of data frames when insufficient data is available, and using additional data lanes to transmit control bits and validity indicators concurrently with data payloads, maintaining bus cadence and improving throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multilane capabilities are added to increase throughput, then data transfer capacity is improved, but latency increases due to padding requirements
Solution Approach 1:
The patent implements dynamic frame termination that adapts to the actual data payload size. Instead of fixed-size frames requiring padding, the system dynamically determines when data transmission is complete using validity indicators, allowing frames to be terminated early when less than the maximum data size is transmitted, thus reducing unnecessary transmission time and latency
Solution Approach 2:
The system changes the parameter of frame termination timing from fixed (based on maximum payload size) to variable (based on actual data availability). By introducing validity indicators that signal when data is complete, the system adjusts the transmission duration parameter dynamically, transmitting only the necessary data without padding overhead
2Quantity of substance
If multilane implementation is used to handle complex applications, then data capacity is improved, but bus complexity increases
Solution Approach 1:
The validity indicator mechanism serves multiple functions: it signals data completion, enables early frame termination, and maintains protocol compatibility across different data sizes. This multi-functional approach allows the same bus structure to handle variable data payloads efficiently without requiring separate control mechanisms for each scenario
Solution Approach 2:
The patent introduces validity indicators as intermediary signals that mediate between the data payload and frame termination control. These indicators act as a simple intermediary mechanism that enables complex variable-length frame handling without requiring complex control logic, thereby managing bus complexity while maintaining enhanced data capacity
Data Source
AI summary
Systems, methods, and apparatus are described that enable a serial bus to be operated in one or more modes that employ additional wires for communicating data. A method includes providing a data payload for a first data frame to be transmitted over a plurality of data lanes of a multilane serial bus operated in accordance with an I3C protocol, providing one or more indicators of validity of one or more bytes included in the data payload, and transmitting the first data frame over the multilane serial bus in accordance with a clock signal transmitted on a clock lane of the multilane serial bus.