Multi-Lane Clock-Data Timing Adjustment via Reference Lane
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Solution Overview
Problem
In multi-lane data communication links, frequent clock-data timing training is power-consuming and inefficient, especially as the number of lanes increases, due to timing drift caused by power supply voltage noise, temperature fluctuations, and uncorrelated crosstalk.
Innovation Solution
The method involves selecting a reference lane that is actively used more frequently and performing clock-data timing training only on this lane, then using the resulting information to adjust the timing of other lanes when they transition between active and inactive states, thereby minimizing the aggregate time spent on training and conserving power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If periodic training is performed on each lane of a multi-lane data communication link, then timing accuracy is maintained, but power consumption increases
Solution Approach 1:
The patent merges the timing training operations across multiple lanes by performing training on a reference lane and using the results to adjust timing on other lanes. This combines what would otherwise be separate training operations into a single reference training operation, reducing the total training burden while maintaining timing accuracy across all lanes.
Solution Approach 2:
The reference lane training operation serves multiple functions: it establishes timing accuracy for the reference lane itself and simultaneously provides timing adjustment information for other lanes. This multi-functionality eliminates the need for separate training operations on each lane, reducing overall power consumption while maintaining reliability.
2Reliability
If periodic training is performed on each lane, then timing accuracy is maintained, but training time increases
Solution Approach 1:
The patent combines multiple lane training operations into a single reference lane training operation. By merging the training process across lanes, the total training time is reduced from the sum of individual lane training times to a single training cycle that benefits all lanes through shared timing information.
Solution Approach 2:
The patent uses the timing adjustment information obtained from the reference lane as a copy or template for adjusting other lanes. Instead of performing complete training on each lane, the system copies the successful timing adjustment methodology from the reference lane and applies it to other lanes, significantly reducing training time while maintaining accuracy.
3Productivity
If the number of lanes is increased, then data throughput improves, but the disadvantageous effects of training increase
Solution Approach 1:
The patent merges the training operations for multiple lanes into a single reference lane training operation. This merging approach allows the system to maintain high data throughput through increased lane count while reducing training energy consumption by performing training only once on the reference lane rather than once per lane.
Solution Approach 2:
The reference lane training operation serves all lanes universally, providing timing adjustment information that can be applied across the entire multi-lane system. This universal approach enables the system to scale throughput by adding lanes without proportionally increasing training energy consumption, as the same reference training benefits all lanes.
Data Source
AI summary
Clock-data timing in a multi-lane serial data communication link may be adjusted to compensate for drift. A reference lane may be selected and periodically trained to adjust clock-data timing. In response to initiation of a first lane transitioning from an active state to an inactive state, first information representing the clock-data timing of the reference lane at the time that transition is initiated may be determined. Then, in response to initiation of the first lane transitioning back from the inactive state to the active state, second information representing the clock-data timing of the reference lane at the time that transition is initiated may be determined. The clock-data timing of the first lane may be adjusted based on the first information and the second information.