Multi-Lane FEC Frame Structuring for Optical Interface Throughput
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Solution Overview
Problem
Conventional FEC frame structuring devices and methods struggle to handle optical interfaces with multiple lanes, leading to increased processing speed and power consumption, which deteriorate transmission characteristics.
Innovation Solution
A forward error correction (FEC) frame structuring device and method that includes a multi-lane distributing unit, FEC coding units, a multiplexing unit, demultiplexing unit, FEC decoding units, and a multi-lane synchronizing unit, allowing for independent FEC coding and decoding across multiple lanes, thereby enabling efficient handling of optical interfaces with multiple lanes without unnecessary processing speed increases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the 64B/66B code is used to distribute an OTUk frame to plural lanes independently of any FEC frame, then the optical interface including plural lanes can be handled, but the processing speed increases by about 3% which causes power consumption and circuit scale to increase and transmission characteristics to deteriorate
Solution Approach 1:
The patent divides the FEC frame processing into separate segments for each lane. The distributing unit separates the FEC frame into multiple lanes, and each lane is processed independently by dedicated decoding units. This segmentation allows the system to handle multiple lanes while maintaining the original processing speed by avoiding the need to increase overall processing speed, thus resolving the contradiction between multi-lane adaptability and processing speed control.
2Ease of manufacture
If the OTUk frame method is used, then the FEC frame structuring can be implemented, but it cannot handle optical interface including a plurality of lanes
Solution Approach 1:
The patent extends the conventional single-lane OTUk frame structure into a multi-dimensional structure by adding a lane dimension. The distributing unit maps FEC frames to multiple lanes in a systematic way, and the receiving end uses a collecting unit to reconstruct the original frame structure. This dimensional extension allows the system to maintain the simplicity of OTUk frame structuring while gaining the capability to handle multiple lanes, thus resolving the contradiction between ease of implementation and multi-lane adaptability.
3Productivity
If the processing speed is increased to handle multiple lanes, then the multi-lane transmission can be achieved, but power consumption and circuit scale increase
Solution Approach 1:
The patent segments the processing workload across multiple independent lane processing units rather than increasing the speed of a single processing unit. Each lane is processed at the original speed by dedicated decoding units, so the overall processing capacity increases to handle multiple lanes while each individual processing element operates at the original speed, avoiding the power consumption and circuit scale increases that would result from speeding up a single processor.
Data Source
AI summary
An FEC frame structuring device includes a multi-lane distributing unit that distributes a data frame to be transmitted to n lanes, FEC coding units each performs FEC coding of the distributed data frame independently for each of the n lanes to generate an FEC frame, a multiplexing unit that multiplexes the FEC frame from the FEC coding units by relating to m channels of an optical signal, a demultiplexing unit that demultiplexes the m channels of the received optical signal by relating to the n lanes, FEC decoding units each performs FEC decoding of the demultiplexed FEC frame independently for each of the n lanes, and a multi-lane synchronizing unit that synchronizes the n lanes with each other after the FEC decoding performed by the FEC decoding units to reconstruct the original data frame.