Multi-Lane Link CRC Replay for Errant Lane Detection
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Solution Overview
Problem
Current Ethernet protocols lack inherent facilities for reliable data transmission over Ethernet links, leading to increased buffer space requirements and processing complexity due to the need for explicit ACKs, which consume link bandwidth and introduce latency in high-performance computing environments.
Innovation Solution
A lane error detection and removal mechanism is implemented using Link Transfer Packets (LTPs) with integrated CRCs and replay buffers, allowing for implicit ACKs and reliable data transfer across multi-lane links, reducing the probability of data corruption by detecting and correcting errors within the Link Fabric Sub-Layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If explicit ACKs are used for reliable data transmission, then data reliability is improved, but link bandwidth is consumed and latency increases
Solution Approach 1:
The patent extracts the acknowledgment function from the data transmission protocol and moves it to the physical layer through CRC-based lane error detection. Each lane's error status is independently detected and reported separately from the data payload, allowing reliable transmission confirmation without consuming link bandwidth for explicit ACK messages.
Solution Approach 2:
The patent combines error detection and acknowledgment functions into the existing CRC mechanism at the physical layer. The same CRC calculation used for error detection also serves as an implicit acknowledgment of successful data reception, eliminating the need for separate ACK messages and reducing protocol overhead.
2Reliability
If explicit ACKs with timers are used for reliable transmission, then data reliability is improved, but processing complexity and buffer space requirements increase
Solution Approach 1:
The patent extracts the reliability assurance function from the network stack and implements it at the physical layer through lane error detection. This removes the need for complex TCP-level retransmission logic, timers, and buffer management, significantly simplifying the network stack while maintaining data reliability.
Solution Approach 2:
The physical layer CRC mechanism automatically detects and reports lane errors without requiring higher-layer intervention. The system self-manages error detection and notification, eliminating the need for external acknowledgment protocols and reducing processing complexity across the network stack.
3Speed
If multiple lanes are used for parallel data transmission, then transmission speed is improved, but probability of data corruption increases
Solution Approach 1:
The patent segments the error detection function by implementing independent CRC calculation for each lane. This allows individual lane error detection without affecting other lanes, enabling parallel transmission while maintaining data integrity through granular error monitoring and correction capabilities.
Data Source
AI summary
Method, apparatus, and systems for detecting lane errors and removing errant lanes in multi-lane links. Data comprising link packets is split into a plurality of bitstreams and transmitted over respective lanes of a multi-lane link in parallel. The bitstream data is received at multiple receive lanes of a receiver port and processed to reassemble link packets and to calculate a CRC over the data received on each lane. The link packets include a transmitted CRC that is compared to a received CRC to detect link packet errors. Upon detection of a link packet error, per-lane or per transfer group CRC values are stored, and a retry request is issued to retransmit the bad packet. In conjunction with receipt of the retransmitted packet, per-lane or per transfer group CRC values are recalculated over the received data and compared with the stored per-lane or per transfer group CRC values to detect the lane causing the link packet error.