Multi-Lane Optical Transceiver Clocking for Seamless Lane Switching

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Solution Overview

Problem

Existing multi-lane optical transceivers face challenges in efficiently tracking frequency errors and lane status changes without causing bit errors, leading to increased silicon area and power consumption due to multiple phase interpolators or phase locked loops.

Innovation Solution

Implement a firmware-based feedback loop in multi-lane optical transceivers to dynamically track frequency errors and monitor lane status, using a tunable oscillator and fractional phase-locked loops to minimize chip area and power, enabling seamless lane-switching with minimal errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple independent phase interpolators or phase locked loops are used per lane for PPM tracking, then lane-switching capability is improved, but silicon area and power consumption increase

Engineering Contradiction:
Improvelane-switching capabilityVSAvoidsilicon area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent merges the PPM tracking function across multiple lanes by using a single shared phase interpolator and phase locked loop instead of having independent units per lane. The system captures PPM values from multiple lanes and uses firmware to select and transfer the appropriate PPM information, eliminating the need for redundant hardware on each lane while maintaining seamless lane-switching capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared phase interpolator and phase locked loop are designed to serve multiple lanes universally. The firmware-based PPM tracking system can dynamically adapt to track frequency errors on any active lane, making the single hardware unit multi-functional across all lanes rather than dedicated to one lane per unit.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If multiple independent phase interpolators or phase locked loops are used per lane for PPM tracking, then lane-switching capability is improved, but power consumption increases

Engineering Contradiction:
Improvelane-switching capabilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by stationary object

Solution Approach 1:

The patent merges the PPM tracking function across multiple lanes by using a single shared phase interpolator and phase locked loop instead of having independent units per lane. The system captures PPM values from multiple lanes and uses firmware to select and transfer the appropriate PPM information, eliminating the need for redundant hardware on each lane while maintaining seamless lane-switching capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared phase interpolator and phase locked loop are designed to serve multiple lanes universally. The firmware-based PPM tracking system can dynamically adapt to track frequency errors on any active lane, making the single hardware unit multi-functional across all lanes rather than dedicated to one lane per unit.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Area of stationary object

If firmware-based feedback loop with shared phase interpolator is used, then silicon area and power consumption are reduced, but frequency error tracking precision may worsen

Engineering Contradiction:
Improvesilicon areaVSAvoidfrequency error tracking precision
Core Design Contradiction:
Area of stationary objectVSMeasurement precision

Solution Approach 1:

The patent implements a firmware-based feedback loop that continuously captures PPM values from multiple lanes, monitors frequency errors, and dynamically transfers the most accurate PPM information to the output. This feedback mechanism ensures that even with a shared phase interpolator, the system maintains high frequency error tracking precision by adaptively selecting the best available data from any active lane.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system performs preliminary capture of PPM values from all lanes before lane switching occurs. By pre-capturing and storing PPM information from multiple lanes, the firmware is prepared to immediately transfer the correct PPM data when a lane switch happens, maintaining precision without requiring additional hardware.

Inventive Principle:
Principle #10Preliminary action

4Use of energy by stationary object

If firmware-based feedback loop with shared phase interpolator is used, then power consumption is reduced, but frequency error tracking precision may worsen

Engineering Contradiction:
Improvepower consumptionVSAvoidfrequency error tracking precision
Core Design Contradiction:
Use of energy by stationary objectVSMeasurement precision

Solution Approach 1:

The patent implements a firmware-based feedback loop that continuously captures PPM values from multiple lanes, monitors frequency errors, and dynamically transfers the most accurate PPM information to the output. This feedback mechanism ensures that even with a shared phase interpolator, the system maintains high frequency error tracking precision by adaptively selecting the best available data from any active lane.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system performs preliminary capture of PPM values from all lanes before lane switching occurs. By pre-capturing and storing PPM information from multiple lanes, the firmware is prepared to immediately transfer the correct PPM data when a lane switch happens, maintaining precision without requiring additional hardware.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250293783A1PPM frequency error tracking with lane-status monitoring system for multi-lane direct-detect transceivers
Publication Date: 2025.09.18 CISCO TECHNOLOGY INC
  • US20250293783A1 patent drawing
  • US20250293783A1 patent drawing
  • US20250293783A1 patent drawing

AI summary

Frequency error tracking and lane monitoring techniques for multi-lane optical transceivers are provided. In one aspect, a method includes capturing phase and frequency information recovered by clock-and-data recovery circuits from data traveling along a plurality of lanes of an optical transceiver, with one of the lanes being a master lane; determining a frequency error based on the phase and frequency information of the master lane; outputting, by a tunable oscillator, a reference clock based on the frequency error; and controlling the optical transceiver based on i) a transmitter clock signal generated by a transmitter phase-locked loop (PLL) using the reference clock signal, and ii) a receiver clock signal generated by a receiver PLL using the reference clock signal.