Multilayer III-Nitride Transistor Barrier for High Voltage

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Solution Overview

Problem

Group III-nitride semiconductor devices face challenges in achieving high breakdown voltage and low leakage current due to lattice mismatch, strain, and high gate leakage currents, which limit their performance and reliability in high-frequency and high-power applications.

Innovation Solution

A semiconductor device structure incorporating a substrate with multiple layers, including an AlGa1-aN layer, an In1-bGabN/GaN channel layer, an AlcIndGa1-c-dN spacer layer, an AleIn1-eN nested superlattice barrier layer, and an AlfIngGa1-f-gN leakage suppression layer, formed using pulsed metalorganic chemical vapor deposition, to mitigate electron accumulation and reduce leakage current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If AlGaN/GaN heterostructure is used to achieve high breakdown voltage, then breakdown voltage is improved, but lattice mismatch and strain occur which deteriorate device performance and longevity

Engineering Contradiction:
Improvebreakdown voltageVSAvoiddevice performance and longevity
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The barrier layer is segmented into multiple thin layers with alternating compositions (AlInN and AlGaN layers) forming a superlattice structure. This segmentation reduces lattice mismatch strain by breaking a single thick layer into multiple thin layers with graded compositions, thereby maintaining high breakdown voltage while improving device reliability and reducing dislocation density

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses composite material structure combining AlInN and AlGaN layers in a superlattice configuration. This composite approach allows optimization of each layer's properties: AlInN provides lattice matching benefits while AlGaN contributes to high breakdown voltage, achieving both improved reliability and strength simultaneously

Inventive Principle:
Principle #40Composite materials

2Loss of energy

If gate-drain spacing is reduced to achieve minimum on-resistance, then on-resistance is improved, but breakdown voltage decreases due to insufficient voltage blocking capability

Engineering Contradiction:
Improveon-resistanceVSAvoidbreakdown voltage
Core Design Contradiction:
Loss of energyVSStrength

Solution Approach 1:

The superlattice barrier layer introduces local quality variations in the gate-drain region with alternating high and low band gap layers. This creates localized electric field management that allows reduced gate-drain spacing while maintaining voltage blocking capability, as the structured barrier provides enhanced field distribution and prevents premature breakdown

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the barrier layer parameters by introducing a superlattice structure with varying layer thicknesses and compositions. This parameter optimization allows the barrier to sustain higher electric fields over shorter distances, enabling reduced gate-drain spacing without sacrificing breakdown voltage

Inventive Principle:
Principle #35Parameter changes

3Stability of the object's composition

If AlInN is used to improve lattice matching with GaN, then lattice strain is reduced, but large band offsets and abrupt property changes occur at the interface

Engineering Contradiction:
Improvelattice matchingVSAvoidband offsets and interface property changes
Core Design Contradiction:
Stability of the object's compositionVSObject-generated harmful factors

Solution Approach 1:

The AlInN barrier is segmented into multiple thin layers within the superlattice structure, interspersed with AlGaN layers. This segmentation reduces the abruptness of interface property changes by creating gradual transitions, thereby maintaining lattice matching benefits while reducing harmful band offsets and interface defects

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The alternating AlGaN layers act as intermediaries between AlInN layers, providing a transition zone that mitigates abrupt property changes. These intermediary layers smooth the composition gradient and reduce interface-related harmful effects while preserving the lattice matching advantages of AlInN

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If insulated gate devices are used to reduce gate leakage current, then gate leakage is improved, but manufacturing complexity increases due to unavailable processes for low cost and high yield manufacture

Engineering Contradiction:
Improvegate leakage currentVSAvoidmanufacturing process availability
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The superlattice barrier structure provides self-service by inherently reducing gate leakage current through its quantum confined structure and enhanced barrier properties. The alternating layer structure creates multiple potential barriers that automatically suppress carrier tunneling, achieving low leakage without requiring additional insulated gate processes or complex manufacturing steps

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The device achieves high breakdown voltages and low leakage current, enhancing the performance and reliability of group III-nitride transistors for high-frequency and high-power applications by minimizing strain and surface traps, thereby improving electron mobility and sheet carrier density.

Implementation Method 1

formed using pulsed metalorganic chemical vapor deposition

Methodology Applied
Scientific EffectChemical Vapor Deposition: Chemical Vapour Deposition

Data Source

PatentUS8541817B2Multilayer barrier III-nitride transistor for high voltage electronics
Publication Date: 2013.09.24 NITEK INC
  • US8541817B2 patent drawing
  • US8541817B2 patent drawing
  • US8541817B2 patent drawing

AI summary

An improved high breakdown voltage semiconductor device and method for manufacturing is provided. The device has a substrate and a AlaGa1-aN layer on the substrate wherein 0.1≦a≦1.00. A GaN layer is on the AlaGa1-aN layer. An In1-bGabN/GaN channel layer is on the GaN layer wherein 0.1≦b≦1.00. A AlcIndGa1-c-dN spacer layer is on the In1-bGabN/GaN layer wherein 0.1≦c≦1.00 and 0.0≦d≦0.99. A AleIn1-eN nested superlattice barrier layer is on the AlcIndGa1-c-dN spacer layer wherein 0.10≦e≦0.99. A AlfIngGa1-f-gN leakage suppression layer is on the AleIn1-eN barrier layer wherein 0.1≦f≦0.99 and 0.1≦g≦0.99 wherein the leakage suppression layer decreases leakage current and increases breakdown voltage during high voltage operation. A superstructure, preferably with metallic electrodes, is on the AlfIngGa1-f-gN leakage suppression layer.