Multilayer Capacitor Bump Structure for Acoustic Noise Reduction

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Solution Overview

Problem

Multilayer capacitors generate acoustic noise due to vibrations when voltage is applied, which can lead to user perception of device malfunction and reduced sensor sensitivity, and existing adhesion structures do not effectively balance noise reduction with adhesion strength for reliable electronic device operation.

Innovation Solution

A multilayer capacitor design featuring a stack structure with alternately positioned internal electrodes and dielectric layers, along with external electrodes and bumps having strategically placed holes or recesses, which optimize the hole/bump area ratio to reduce acoustic noise and enhance adhesion strength by modifying the path of vibrations and improving contact area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the multilayer capacitor uses a dielectric material with high dielectric constant, then the capacitance is improved, but acoustic noise is generated due to piezoelectric vibrations

Engineering Contradiction:
ImprovecapacitanceVSAvoidacoustic noise
Core Design Contradiction:
Quantity of substanceVSObject-generated harmful factors

Solution Approach 1:

The patent introduces a damping layer as an intermediary substance between the multilayer capacitor and the printed circuit board. This damping layer absorbs the piezoelectric vibrations generated by the capacitor, preventing them from being transmitted to the board and causing acoustic noise, while allowing the capacitor to maintain its high capacitance performance

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs a relatively thin damping layer (1-10 μm) that serves as a sacrificial element to absorb vibrations. This thin layer is sufficient to dampen the piezoelectric effects without adding significant complexity or cost to the overall capacitor structure

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Device complexity

If the connection structure between the multilayer capacitor and another structure is simplified, then the device complexity is reduced, but the adhesion strength is insufficient

Engineering Contradiction:
Improveconnection structure complexityVSAvoidadhesion strength
Core Design Contradiction:
Device complexityVSStrength

Solution Approach 1:

The patent uses a composite connection structure consisting of a damping layer combined with conductive adhesive material. This composite approach provides both mechanical adhesion strength to bond the capacitor to the board and electrical conductivity for signal transmission, while maintaining a relatively simple overall structure

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The damping layer serves multiple functions simultaneously: it provides mechanical adhesion between the capacitor and board, dampens piezoelectric vibrations to reduce acoustic noise, and can also provide electrical conductivity when combined with conductive adhesive, eliminating the need for separate structural and functional layers

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively reduces acoustic noise and increases adhesion strength, enhancing the operational reliability of electronic devices by minimizing vibration transmission and improving the connection between the capacitor and other structures.

Implementation Method 1

The dielectric material having high dielectric constant, which may be used for the multilayer capacitor, may also have a piezoelectric property, and the multilayer capacitor may thus be vibrated minutely when voltage is applied thereto

Methodology Applied
Scientific EffectPiezoelectric effect: Piezoelectric Effect

Data Source

PatentUS12033803B2Multilayer capacitor
Publication Date: 2024.07.09 SAMSUNG ELECTRO MECHANICS CO LTD
  • US12033803B2 patent drawing
  • US12033803B2 patent drawing
  • US12033803B2 patent drawing

AI summary

A multilayer capacitor includes: a body including a stack structure in which at least one first internal electrode and at least one second internal electrode are alternately stacked on each other having at least one dielectric layer interposed therebetween in a first direction; first and second external electrodes disposed on the body while being spaced apart from each other to be respectively connected to first internal electrode and second internal electrode; and first and second bumps respectively having one surfaces disposed on the first or second external electrode and including at least one hole positioned in the one surface or the other surface, wherein AV indicates a total area of the at least one hole, AB indicates an area of the one surface of the first or second bump, facing the first or second external electrode, and AV/AB is greater than 0.012 and less than 0.189.