Multilayer Capacitor Diagonal Lead Configuration for Low ESL

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Solution Overview

Problem

High-performance Large Scale Integration (LSI) systems face challenges in power noise stability due to increased voltage fluctuations and high-frequency components, which are exacerbated by high power supply impedance, particularly influenced by the design of the board and decoupling capacitors, necessitating the development of low equivalence series inductance (ESL) capacitors to reduce impedance.

Innovation Solution

A multilayer capacitor design featuring a capacitor body with alternating internal electrodes, a dielectric layer, and external electrodes, along with insulating layers, is implemented to reduce ESL by optimizing the lead portion configurations and mounting structure, which enhances capacitance and reduces inductance, thereby improving power supply impedance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional multilayer capacitor design is used, then manufacturing is simpler, but power supply impedance is high and ESL is not sufficiently reduced

Engineering Contradiction:
Improvepower supply impedanceVSAvoidlead portion configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies asymmetry by configuring lead portions to extend in diagonal directions rather than symmetric parallel directions. Specifically, first and second lead portions extend from the first internal electrode in diagonal directions relative to each other, while third and fourth lead portions extend from the second internal electrode in diagonal directions. This asymmetric diagonal configuration reduces the current loop area compared to conventional symmetric designs, thereby reducing ESL and power supply impedance.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent transitions from a conventional planar lead arrangement to a three-dimensional diagonal configuration. The lead portions extend in diagonal directions both within the plane and in the vertical dimension, creating a spatial arrangement that minimizes the current loop area. This dimensional change allows for reduced ESL without increasing the footprint area of the capacitor.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If LSI systems operate at higher frequencies and currents, then processing speed and multifunctionality increase, but voltage fluctuations and power noise increase

Engineering Contradiction:
Improveprocessing speedVSAvoidpower noise
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent changes the geometric parameters of the capacitor structure, specifically the configuration and orientation of lead portions. By extending lead portions in diagonal directions and optimizing their spacing, the patent reduces the current loop area parameter. This parameter change directly reduces ESL, enabling the capacitor to effectively suppress high-frequency power noise generated by high-performance LSI systems operating at increased frequencies and currents.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If low ESL capacitors are developed, then power supply impedance decreases, but device structure becomes more complex

Engineering Contradiction:
Improvepower noise stabilityVSAvoidinternal electrode configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent achieves multi-functionality where the diagonal lead portion configuration simultaneously accomplishes multiple objectives: it reduces current loop area to lower ESL, maintains structural integrity during mounting, and provides adequate electrical connection to external electrodes. This universal design approach reduces power supply impedance while avoiding excessive structural complexity, as the same diagonal configuration serves multiple functional purposes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10658112B2Multilayer capacitor and board having the same
Publication Date: 2020.05.19 SAMSUNG ELECTRO MECHANICS CO LTD
  • US10658112B2 patent drawing
  • US10658112B2 patent drawing
  • US10658112B2 patent drawing

AI summary

A multilayer capacitor includes a capacitor body including first and second internal electrodes disposed alternately in a width direction; first and second external electrodes spaced apart from each other on a mounting surface; and a first insulating layer disposed between the first and second external electrodes, in which the first and second internal electrodes each include a body portion, a first lead portion extending from the body portion toward the mounting surface and electrically connected to the first and second external electrodes, and a second lead portion extending from the body portion toward a surface of the capacitor body opposing the mounting surface, and the first and second lead portions extend from each body portion in a diagonal direction relative to each other.