Multilayer Capacitor Electrode Layout for Lower ESR and Inductance
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Solution Overview
Problem
Existing multilayer capacitors face challenges in high-speed environments due to increased electric field and charge concentrations at corners, leading to reduced breakdown voltage and higher equivalent series resistance and inductance, which are not adequately addressed by conventional designs.
Innovation Solution
The capacitors feature electrode layers with non-perpendicular edges, such as Y-shaped configurations and rounded corners, along with specific material choices, to reduce electric field concentrations and minimize geometric discontinuities, resulting in lower equivalent series resistance and inductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If conventional capacitor designs are used, then manufacturing is simpler, but breakdown voltage is insufficient for high-speed environments
Solution Approach 1:
The electrode layers incorporate rounded corners instead of sharp angles, which reduces electric field concentration at the corners. This curvature modification allows the capacitor to achieve higher breakdown voltage by preventing field-induced breakdown at stress points, while maintaining a relatively simple manufacturing process.
Solution Approach 2:
The electrode design features non-perpendicular connecting edges that create asymmetric field distribution patterns. This asymmetry is intentionally designed to reduce charge concentration at specific high-stress locations, thereby improving overall breakdown voltage performance without requiring complete redesign of the entire capacitor structure.
2Reliability
If electrode layers with non-perpendicular edges are used, then equivalent series resistance is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent specifies that the connecting edges form angles between 80-100 degrees rather than requiring exact 90-degree perpendicularity. This parameter range approach reduces equivalent series resistance by optimizing current distribution, while providing manufacturing tolerance that reduces precision requirements compared to exact perpendicularity specifications.
3Volume of moving object
If capacitor size is reduced for miniaturization, then footprint is smaller, but inductance increases
Solution Approach 1:
The electrode layers are designed to extend beyond the immediate capacitor body boundaries in specific patterns, utilizing spatial dimensions more efficiently. This dimensional optimization allows smaller footprint while maintaining lower inductance by optimizing current path lengths and distributions in three-dimensional space.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances breakdown voltage and reduces equivalent series resistance and inductance, providing improved performance in high-speed applications with a smaller footprint and reduced parasitic inductance.
Implementation Method 1
reduce electric field and charge concentrations
Implementation Method 2
reduce electric field and charge concentrations
Data Source
AI summary
The present invention is directed to a multilayer capacitor, a circuit board containing the multilayer capacitor, and an integrated circuit package containing the multilayer capacitor. A multilayer capacitor a body containing alternating dielectric layers and electrode layers. Each electrode layer includes a first electrode having a base, connecting, and central sections; a first connecting edge extending from a first leading edge of the base section to a first edge of the central section; and a second connecting edge extending from a second leading edge of the base section to a second edge of the central section. At least a portion of at least one of the first connecting edge or the second connecting edge of the first electrode of the electrode layers is not perpendicular to the respective first edge or second edge of the central section of the first electrode.