Multilayer Capacitor Side-Margin Composition for Moisture Resistance
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Solution Overview
Problem
Multilayer ceramic capacitors face challenges in achieving high capacitance and miniaturization due to issues such as moisture penetration, pore formation at interfaces, and differences in shrinkage rates between internal electrodes and dielectric layers, which affect reliability and breakdown voltage.
Innovation Solution
The solution involves a multilayer electronic component design where the intensity ratio of Na to Ti in the capacitance forming portion and the side margin portions are controlled within specific ranges (0.436 < RM/RA < 0.920 and 1.75×10−4 < RA < 9.10×10−4) to improve moisture resistance reliability and dielectric density, even during low-temperature sintering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a ceramic green sheet for a side margin portion is separately attached to the body surface before sintering to maximize electrode area, then capacitance per unit volume is improved, but pores are formed at the interface between the body and side margin portion, causing moisture penetration and reduced reliability
Solution Approach 1:
The patent applies parameter changes by controlling the sintering temperature within a specific range (900°C to 1100°C) and optimizing the Na/Ti intensity ratio (0.1 to 1.0) in the side margin portion to achieve dense interface bonding without pores, resolving the contradiction between maximizing capacitance and ensuring moisture resistance
Solution Approach 2:
The patent applies local quality by creating a distinct compositional characteristic in the side margin portion with controlled Na and Ti content compared to the capacitance forming portion, ensuring that the interface region has optimized properties for both electrical performance and moisture resistance
2Manufacturing precision
If internal electrodes and dielectric layer are sintered at high temperature to achieve densification, then sintering density is improved, but difference in shrinkage rates between internal electrodes and dielectric layer causes difficulty in achieving desired characteristics
Solution Approach 1:
The patent applies parameter changes by lowering the sintering temperature range to 900°C to 1100°C and controlling the Na/Ti intensity ratio in the side margin portion, which enables sufficient densification while minimizing differential shrinkage between internal electrodes and dielectric layer, achieving both density and dimensional consistency
3Volume of moving object
If the body is miniaturized to meet compactness requirements, then device size is reduced, but the interface between body and side margin portion becomes more critical for moisture resistance
Solution Approach 1:
The patent applies local quality by optimizing the chemical composition specifically in the side margin portion with controlled Na and Ti content, creating a localized region with enhanced properties that ensures moisture resistance even in miniaturized devices where the interface occupies a larger relative portion of the structure
Solution Approach 2:
The patent applies parameter changes by controlling the sintering temperature (900°C to 1100°C) and Na/Ti intensity ratio (0.1 to 1.0) to achieve dense interface bonding that prevents moisture penetration, maintaining high reliability despite the increased criticality of interfaces in miniaturized devices
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the moisture resistance reliability, dielectric density, and temperature characteristics of the multilayer electronic component, effectively addressing the challenges of miniaturization and high capacitance.
Implementation Method 1
in manufacturing the multilayer ceramic capacitor, a method of exposing internal electrodes in a width direction of a body to maximize an area of the internal electrodes in the width direction through design without a margin and separately attaching a ceramic green sheet for a side margin portion to a surface of the body to which the electrodes are exposed in the width direction before a stage of sintering the body is applied
Implementation Method 2
during the sintering process, internal electrodes and a dielectric layer having different melting points have different shrinkage rates
Data Source
AI summary
A multilayer electronic component includes a body including a capacitance forming portion including a dielectric layer and internal electrodes disposed in a first direction and including first and second surfaces opposing each other in the first direction, third and fourth surfaces connected to the first and second surfaces and opposing each other in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and opposing each other in a third direction, side margin portions respectively disposed on the fifth and sixth surfaces, and external electrodes respectively disposed on the third and fourth surfaces. 0.436<RM/RA<0.920 and 1.75×10−4<RA<9.10×10−4 are satisfied, in which RA is an intensity ratio of Na relative to Ti included in the capacitance forming portion and RM is an intensity ratio of Na relative to Ti included in one of the side margin portions.