Multilayer Capacitor Vertical Current Path ESL Reduction
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Solution Overview
Problem
High power impedance in LSI circuits due to increased equivalent series inductance (ESL) of decoupling capacitors, which affects system stability and resilience against power noise, especially in high-frequency applications.
Innovation Solution
A multilayer capacitor design with a ceramic body featuring stacked dielectric layers and alternately disposed internal electrodes, where the cross-sectional area of the current path is minimized to decrease ESL and maximize capacitance, and an insulating layer covers exposed internal electrodes to prevent short-circuits and enhance moisture resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the cross-sectional area of the current path is decreased to reduce ESL, then the equivalent series inductance decreases and capacitance increases, but the manufacturing precision requirements increase due to the smaller current path area
Solution Approach 1:
The patent transitions from a conventional horizontal current path to a vertical current path by stacking dielectric layers and internal electrodes perpendicularly to the mounting surface. This dimensional change allows the current to flow through the thickness of the capacitor rather than across the surface, significantly reducing the cross-sectional area of the current path and thereby reducing ESL while maintaining manufacturability through standard stacking processes
2Reliability
If the cross-sectional area of the current path is decreased to increase capacitance, then the power impedance decreases, but the device complexity increases due to the need for precise alignment of stacked layers
Solution Approach 1:
The capacitor is divided into multiple thin dielectric layers and internal electrodes stacked alternately, with each layer contributing to the total capacitance. This segmentation allows the current path to pass through multiple small cross-sectional areas in series, effectively reducing the overall ESL while distributing the manufacturing complexity across multiple manageable layers rather than requiring a single complex structure
Solution Approach 2:
By stacking layers perpendicular to the mounting surface, the patent creates a three-dimensional structure where the current path extends through the thickness dimension rather than spreading across the surface area. This vertical stacking reduces the current path cross-section and ESL while the modular layered structure manages complexity through standardized repetition of electrode-dielectric units
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design significantly reduces ESL, increases capacitance, and improves system stability by effectively absorbing voltage variations and noise in LSI power supply circuits, enhancing the resilience against power noise and reducing the number of capacitors needed.
Implementation Method 1
an insulating layer formed on the mounting surface of the ceramic body to cover portions of the first and second internal electrodes exposed to the mounting surface but not in contact with the first and second external electrodes
Implementation Method 2
a ceramic body including a plurality of dielectric layers stacked to be disposed perpendicularly to a mounting surface of the ceramic body, and first and second internal electrodes alternately disposed, with respective dielectric layers interposed therebetween
Data Source
AI summary
A multilayer capacitor includes a ceramic body including a plurality of dielectric layers stacked to be disposed perpendicularly to a mounting surface of the ceramic body, and first and second internal electrodes alternately disposed, with respective dielectric layers interposed therebetween, the first and second internal electrodes being exposed to the mounting surface of the ceramic body and first and second end surfaces of the ceramic body opposing each other, respectively; first and second external electrodes disposed on the ceramic body to be connected to the first and second internal electrodes, respectively; and an insulating layer disposed on the mounting surface of the ceramic body and covering portions of the first and second internal electrodes exposed to the mounting surface but not in contact with the first and second external electrodes.