Multilayer Capacitor Via-Slit Layout for Low ESL and Capacitance
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Solution Overview
Problem
Existing multilayer capacitors face issues such as a decrease in capacitance due to the skin effect in high-frequency regions and deterioration in characteristics like capacitance and ESR, along with a decrease in mechanical strength, especially when vias are arranged at a narrow pitch.
Innovation Solution
A multi-terminal multilayer capacitor design that includes first and second internal electrodes alternately stacked with a dielectric layer, and a unique configuration of vias and slits that prevent the internal electrodes from being divided into isolated regions, ensuring a common voltage is applied and maintaining low ESL and ESR.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If multiple vias are arranged at narrow pitch to reduce ESL, then equivalent series inductance decreases, but capacitance decreases due to skin effect
Solution Approach 1:
The internal electrodes are divided into multiple regions by slits, and multiple vias are arranged within each region. This segmentation allows the via structure to be optimized for low ESL while the intact electrode regions maintain sufficient capacitance by preventing skin effect current concentration.
Solution Approach 2:
Different regions of the internal electrodes have different functions: some regions contain vias for low ESL performance, while other regions maintain continuous electrode structure for capacitance. The slits create localized insulation that enables this functional differentiation within the same electrode structure.
2Object-affected harmful factors
If internal electrode is divided into multiple insulated regions to reduce ESL, then equivalent series inductance decreases, but characteristics such as capacitance and ESR deteriorate
Solution Approach 1:
The internal electrode is segmented into multiple regions by slits, but these regions are electrically connected through vias that penetrate the dielectric layers. This segmentation with connection maintains low ESL while preserving electrode integrity for reliable capacitance and ESR characteristics.
Solution Approach 2:
The vias act as intermediary conductive elements that connect the slit-divided electrode regions. These intermediaries enable electrical continuity between segmented regions, maintaining low inductance while preserving the electrode's capacitive function.
3Object-affected harmful factors
If internal electrode is divided into multiple insulated regions, then ESL decreases, but mechanical strength of the element decreases
Solution Approach 1:
The electrode is segmented by slits to reduce ESL, but the segmentation is limited to creating insulation barriers rather than complete separations. The vias and remaining electrode material maintain structural continuity, preserving mechanical strength while achieving low inductance.
Solution Approach 2:
The slits are nested within the electrode structure without completely separating it. The electrode regions remain nested and connected through vias, creating a nested configuration that reduces inductance while maintaining structural integrity and mechanical strength.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces or prevents a decrease in capacitance while maintaining low ESL in high-frequency regions, and secures the mechanical strength of the element, thereby enhancing the overall performance of the multilayer capacitor.
Implementation Method 1
the first via electrically connects the plurality of first regions, and the second via electrically connects the plurality of second regions
Implementation Method 2
magnetic fields induced by currents flowing through the internal electrodes connected to the first conductive via holes and the second conductive via holes cancel each other
Implementation Method 3
first internal electrodes and second internal electrodes alternately stacked with a dielectric layer interposed between the first internal electrode and the second internal electrode
Implementation Method 4
the first internal electrode is split into a plurality of first regions by the first slit and the first via electrically connects the plurality of first regions
Data Source
AI summary
A multi-terminal multilayer capacitor includes first vias and second vias extending in first and second internal electrodes in a stacking direction, a first slit extending between the first via and a first insulating portion that insulates the second via and the first internal electrode from each other, and a second slit extending between the second via and a second insulating portion that insulates the first via and the second internal electrode from each other. The first via electrically connects regions of the first internal electrode split by the first slit, and the second via electrically connects regions of the second internal electrode divided by the second slit.