Multilayer Carrier Substrate for Optical Interconnects
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Solution Overview
Problem
Integrating electronic circuits with photonic components poses challenges due to limited real estate on semiconductor substrates, incompatibility in fabrication processes, and interconnect issues between electronic and photonic devices.
Innovation Solution
A multilayer platform is developed that includes a carrier substrate with embedded semiconductor integrated circuit dies and planar layers containing optical waveguides and photonic devices, enabling intra-die or inter-die optical connectivity without converting optical signals to electrical signals, allowing flexible routing and separation of fabrication processes for IC and optical layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If electronic circuits and photonic components are integrated on the same semiconductor substrate, then bandwidth and communication speed are improved, but fabrication process incompatibility and manufacturing complexity increase
Solution Approach 1:
The patent divides the integrated circuit into multiple separate dies: electronic circuit dies and photonic device dies. Each die is fabricated using its own optimized process on separate substrates, then assembled together in a multi-chip module. This segmentation resolves the fabrication incompatibility while maintaining the high-speed optical communication benefits.
Solution Approach 2:
The patent introduces carrier substrates as intermediary elements that hold and position both electronic and photonic dies. The carrier substrates provide a common platform for integrating differently-fabricated components, enabling optical interconnects between dies without requiring direct substrate integration.
2Productivity
If more photonic components and electronic circuits are integrated together, then bandwidth increases, but available real estate on substrate decreases
Solution Approach 1:
The patent transitions from planar integration to three-dimensional stacking by placing multiple dies on vertical carrier substrates. Optical waveguides extend vertically between layers, enabling high-density interconnects in the vertical dimension rather than competing for horizontal substrate real estate.
Solution Approach 2:
The patent implements a hierarchical structure where photonic devices are integrated within or alongside electronic circuit dies, and multiple such dies are stacked on carrier substrates. This nested arrangement maximizes component density while maintaining separate fabrication processes for each die type.
3Use of energy by moving object
If optical interconnects are integrated with electronic circuits, then power consumption is reduced, but interconnect complexity and device integration difficulty increase
Solution Approach 1:
The patent extracts the optical interconnect function into separate photonic device dies that are independently fabricated and then integrated with electronic dies. This separation simplifies each individual die's design while enabling optical communication benefits, as each die focuses on its specialized function rather than attempting full integration.
Data Source
AI summary
Techniques, systems, and devices are disclosed to provide multilayer platforms for integrating semiconductor integrated circuit dies, optical waveguides and photonic devices to provide intra-die or inter-die optical connectivity. For example, an integrated semiconductor device having integrated circuits respectively formed on different semiconductor integrated circuit dies is provided to include a carrier substrate structured to form openings on a top side of the carrier substrate; semiconductor integrated circuit dies fixed to bottom surfaces of the openings of the carrier substrate, each semiconductor integrated circuit die including a semiconductor substrate and an integrated circuit formed on the semiconductor substrate to include one or more circuit components, and each semiconductor integrated circuit die being structured to have a top surface substantially coplanar with the top side of the carrier substrate; and planar layers formed on top of the top surfaces of the semiconductor integrated circuit dies and the top side of the carrier substrate to include optical waveguides and photonic devices to provide (1) intra-die optical connectivity for photonic devices associated with a semiconductor integrated circuit die, or (2) inter-die optical connectivity for photonic devices associated with different semiconductor integrated circuit dies.