Multilayer Ceramic Device Grain Size Control
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Solution Overview
Problem
The challenge is to maintain high specific permittivity and capacitance in multilayer ceramic electronic devices as dielectric layers are miniaturized to 0.5 μm or less, where grain size reduction typically leads to decreased specific permittivity and insulation deterioration.
Innovation Solution
The solution involves controlling the grain size ratio by making the average grain size of dielectric grains in the capacitance region larger than those in exterior and lead-out areas, ensuring Dg/Di ≥ 1, and ensuring 10% or more of dielectric grains contact both internal electrode layers, thereby maintaining specific permittivity and capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the thickness of dielectric layers is reduced to 0.5 μm or less to achieve miniaturization, then the device size is reduced, but the specific permittivity remarkably decreases and insulation deterioration occurs
Solution Approach 1:
The patent applies local quality by creating two distinct regions with different grain size characteristics: a capacitance region with controlled smaller grain sizes (0.1-0.5 μm) to maintain high specific permittivity, and exterior/lead-out areas with larger grain sizes for mechanical strength and insulation. This spatial differentiation of grain sizes allows the thin dielectric layers (0.5 μm or less) to maintain both electrical performance and structural integrity
Solution Approach 2:
The patent changes the grain size parameter differently across regions: in the capacitance region, grain size is controlled to be 0.1-0.5 μm (smaller) to maximize specific permittivity, while in exterior and lead-out areas, grain size is allowed to be larger (Dg/Di ≥ 1). This parameter differentiation resolves the contradiction by optimizing local electrical properties without compromising overall device reliability
2Length of stationary object
If the grain size of dielectric grains is reduced to thin the dielectric layers, then the layer thickness is reduced, but the specific permittivity decreases
Solution Approach 1:
The patent implements local quality control by restricting smaller grain sizes (0.1-0.5 μm) specifically to the capacitance region where high specific permittivity is critical, while allowing larger grains in exterior and lead-out areas. This localized grain size control enables thin dielectric layers to achieve both reduced thickness and maintained specific permittivity in the functional capacitance region
Solution Approach 2:
The patent introduces a spatial dimension to grain size control by creating a gradient structure where grain size varies across different regions of the dielectric layer. By controlling the ratio Dg/Di ≥ 1 and ensuring 10% or more of grains contact both electrode layers, the patent adds a dimensional aspect to grain size management, allowing thin layers to maintain electrical performance through strategic grain distribution rather than uniform grain size
3Reliability
If metallic thin film layers are added between dielectric layers and internal electrode layers to prevent insulation deterioration, then insulation reliability is improved, but device complexity increases
Solution Approach 1:
The patent changes the fundamental parameter from material composition (adding metallic thin films) to microstructural characteristics (grain size distribution and grain-electrode contact). By controlling grain size (0.1-0.5 μm in capacitance region) and ensuring adequate grain-electrode contact (10% or more), the patent achieves insulation reliability through microstructural optimization rather than additional material layers, thereby avoiding increased device complexity
Data Source
AI summary
Provided is a multilayer ceramic electronic device which is capable of preventing decrease of the specific permittivity and of showing less drop of capacitance, even when the dielectric grains constituting the dielectric layers become smaller for thinning of the dielectric layers, wherein Dg/Di≥1 is satisfied, in case that “Di” is an average grain size of the first dielectric grains constituting the dielectric layer in the capacitance region and “Dg” is an average grain size of the second dielectric grains in an exterior area.