Multilayer Semiconductor Chip Mounted Body Using Self-Assembled Solder Bumps
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current stacked package configurations face challenges in miniaturization, thickness reduction, and manufacturing complexity due to wire bonding, flip chip bonding, and the use of interposers and spacer substrates, which restricts further density and cost-effectiveness.
Innovation Solution
A mounted body with a multilayer semiconductor chip and a mounting board where element electrodes are connected via self-assembled solder bumps formed from a solder resin paste containing solder particles and a convection additive, allowing for easy assembly and reduced manufacturing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire bonding is used to connect semiconductor chips, then electrical connections can be established, but the loop height of wires increases the thickness and mounting area, restricting miniaturization
Solution Approach 1:
The patent removes the wire bonding process entirely from the stacked package structure. Instead of using wires to connect chips, the invention directly bonds semiconductor chips to the substrate and to each other through flip-chip technology, eliminating the wire loop height that increases thickness
Solution Approach 2:
The patent replaces the mechanical wire bonding system with a direct solder bump bonding system. Solder bumps are formed on the chip electrodes and directly connect to substrate electrodes, substituting the wire-mediated mechanical connection with a direct metallurgical bond
2Reliability
If wire bonding is used for multiple semiconductor chips, then electrical connections are established, but the manufacturing process becomes complicated with many WB steps
Solution Approach 1:
The patent combines multiple wire bonding operations into a single flip-chip bonding process. All electrical connections for multiple chips are established simultaneously through one bonding step rather than requiring separate wire bonding steps for each chip
Solution Approach 2:
The patent employs self-aligned bonding where the solder bumps automatically align with the substrate electrodes during the bonding process, eliminating the need for complex alignment and positioning steps that would increase manufacturing complexity
3Adaptability or versatility
If interposers and spacer substrates are used in stacked packages, then chip stacking is enabled, but the device thickness increases and manufacturing complexity increases
Solution Approach 1:
The patent removes interposers and spacer substrates from the stacked package structure. Chips are stacked directly on the substrate using flip-chip bonding, eliminating the intermediate layers that increase thickness
Solution Approach 2:
The patent transitions from planar chip arrangement to three-dimensional stacking by utilizing the vertical dimension through flip-chip bonding, enabling chip stacking without requiring additional horizontal space or intermediate substrates
4Quantity of substance
If conventional stacked package configurations are used, then packaging density is increased, but manufacturing complexity and cost increase due to multiple components
Solution Approach 1:
The patent merges multiple discrete components (chips, interposers, spacers, wires) into a simplified structure where chips are directly bonded to the substrate. This consolidation maintains high packaging density while reducing manufacturing complexity
Solution Approach 2:
The substrate serves multiple functions simultaneously: it provides mechanical support, electrical connections, and thermal management. This multi-functionality eliminates the need for separate interposers and spacer substrates, reducing component count while maintaining packaging density
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables easier manufacturing of stacked packages with increased packaging density, reduced thickness, and lower costs by eliminating the need for complex wire bonding and interposer use, while ensuring reliable electrical connections.
Implementation Method 1
heating the solder resin paste so that the convection additive boils to cause convection in the resin, thus causing the solder powder assembles to form a solder bump
Implementation Method 2
the solder powder assembles to form a solder bump
Data Source
AI summary
A mounted body of the present invention includes: a multilayer semiconductor chip 20 including a plurality of semiconductor chips 10 (10a, 10b) that are stacked; and a mounting board 13 on which the multilayer semiconductor chip 20 is mounted. In this mounted body, each of the semiconductor chips 10 (10a, 10b) in the multilayer semiconductor chip 20 has a plurality of element electrodes 12 (12a, 12b) on a chip surface 21 (21a, 21b) facing toward the mounting board 13. On the mounting board 13, electrode terminals 14 are formed so as to correspond to the plurality of element electrodes (12a, 12b), respectively, and the electrode terminals 14 of the mounting board and the element electrodes (12a, 12b) are connected electrically to each other via solder bump formed as a result of assembly of solder particles. With this configuration, a mounted body on which a stacked package is mounted can be manufactured easily.


