Multilayer Circuit Board Interlayer Insulating Layer Bowing Control
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Solution Overview
Problem
Multilayer circuit boards experience bowing due to stress differences caused by uneven interlayer insulating layers, leading to flatness issues and potential bonding failures during electronic component mounting and assembly.
Innovation Solution
The solution involves forming an interlayer insulating layer partially on the base circuit board, corresponding to regions where pattern layers are formed, using a liquid polyimide component and curing it, with the layer area ranging from 1% to 50% of the total base layer area, and connecting pattern layers through conduction holes in both the base and insulating layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an interlayer insulating layer is formed almost all over the base circuit board, then insulation coverage is improved, but stress balance deteriorates causing bowing phenomenon
Solution Approach 1:
The interlayer insulating layer is selectively formed only in regions where pattern layers are present, rather than covering the entire base circuit board. This local formation approach maintains insulation where needed while avoiding stress concentration in pattern-free areas, thereby preventing bowing and maintaining flatness.
Solution Approach 2:
Instead of forming the interlayer insulating layer completely across the entire base circuit board (excessive action), the layer is formed partially only in necessary regions. This partial formation reduces unnecessary material deposition and associated stress, eliminating the bowing phenomenon while still providing adequate insulation.
2Adaptability or versatility
If the number of pattern layers stacked on both sides of the base circuit board is asymmetric, then design flexibility is improved, but stress difference increases causing greater bowing
Solution Approach 1:
The interlayer insulating layer is formed locally corresponding to pattern layer regions, creating a balanced stress distribution that compensates for asymmetric pattern layer stacking. This local formation approach allows asymmetric designs while maintaining overall stress balance and flatness.
3Reliability
If an interlayer insulating layer is formed over the entire base circuit board, then insulation is improved, but the amount of insulating material used increases
Solution Approach 1:
The unnecessary portions of the interlayer insulating layer are extracted by limiting its formation only to regions where pattern layers are present. This extraction eliminates waste of insulating material in pattern-free areas while maintaining adequate insulation coverage where needed.
Solution Approach 2:
The interlayer insulating layer is formed partially rather than completely across the entire base circuit board. This partial formation reduces the total amount of insulating material consumed while still providing sufficient insulation in the necessary regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces stress imbalances, minimizes bowing, improves flatness, and reduces the amount of insulating material used, resulting in better electronic component bonding and raw material savings.
Implementation Method 1
forming an interlayer insulating layer partially on the base circuit board, corresponding to regions where pattern layers are formed, using a liquid polyimide component and curing it
Data Source
AI summary
The present invention provides a multilayer circuit board and a method for manufacturing the same for improving a bowing problem that occurs when manufacturing the multilayer circuit board. A multilayer circuit board according to the present invention is a board having a patterned layer that functions as a circuit a base layer, and includes: a second pattern layer formed on one side of the base layer; a first pattern layer formed on the second pattern layer; and an interlayer insulating layer formed between the first pattern layer and the second pattern layer, the interlayer insulating layer being partially formed on the second pattern layer so as to correspond to a region where the first pattern layer is formed.