Multilayer Circuit Routing Using Identical Mask Layers

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The semiconductor industry faces challenges in reducing the size of integrated circuits due to increasing costs and complexity associated with manufacturing multilayer circuits, primarily caused by the need for a large number of unique masks for routing connections between layers.

Innovation Solution

The use of substantially identical layers for routing electrical pathways in multilayer circuits, allowing the same set of masks to be used across multiple layers, significantly reducing manufacturing costs and complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If unique masks are used for routing connections in each layer of multilayer circuits, then routing flexibility and connection precision are improved, but manufacturing cost and complexity increase significantly

Engineering Contradiction:
Improverouting connection precisionVSAvoidmanufacturing complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies universality by designing identical routing layers that can be formed using the same mask across multiple layers. Instead of creating unique masks for each layer's routing connections, the invention uses a universal mask design that repeats across layers, allowing the same manufacturing process and mask set to serve multiple routing functions in different layers, thereby reducing manufacturing complexity while maintaining routing precision

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent segments the routing function into identical modular layers. Each layer contains the same routing pattern segmented into comparable units (traces and vias), allowing the routing complexity to be divided into repeatable modules rather than requiring unique complex patterns for each layer, which simplifies mask fabrication and application

Inventive Principle:
Principle #1Segmentation

2Productivity

If the number of layers in multilayer circuits is increased to improve planar density, then three-dimensional integration is achieved, but the number of unique masks required increases prohibitively

Engineering Contradiction:
Improveplanar densityVSAvoidnumber of masks
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies the nested doll principle by placing identical routing layers in a nested stack configuration. Each layer is a copy of the same routing pattern, nested vertically above one another, allowing multiple layers to be formed using the same mask set through repeated deposition and etching cycles, thereby achieving high planar density without proportionally increasing mask complexity

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent transitions from two-dimensional unique routing patterns to three-dimensional repeated routing patterns. By stacking identical routing layers in the vertical dimension, the invention achieves increased planar density through vertical integration rather than through increasingly complex two-dimensional mask designs, effectively moving the complexity management from the planar domain to the vertical domain

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9793275B2Multilayer circuit
Publication Date: 2017.10.17 HEWLETT PACKARD ENTERPRISE DEV LP
  • US9793275B2 patent drawing
  • US9793275B2 patent drawing
  • US9793275B2 patent drawing

AI summary

A multilayer circuit (400) includes a base layer (205) which has a number of base vias (247, 415), a first overlying layer (215) formed on the base layer (205) and having a first routing section (210) and a second overlying layer (220) formed on the first overlying layer (215). The second overlying layer (220) has a second routing section (210) and is formed using the same set of masks. The first routing section (210) and the second routing section (210) form a unique electrical pathway (248) between a base via (247) and an element in an overlying layer. A method for forming a multilayer circuit is also provided.