Multilayer Connection Pad Layout for High-Resolution Array Substrates
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Solution Overview
Problem
Existing display panel manufacturing processes face challenges in efficiently testing the electrical properties of semiconductor elements due to limitations in the design of connection pads, which occupy significant space and hinder high-resolution display apparatus development.
Innovation Solution
The array substrate incorporates a connection pad with multiple layers of probe contact pads and connection lines, including first, second, and optionally third connection lines in different layers, reducing the overall space required for testing connections and allowing for a more compact design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If connection pads are designed with traditional single-layer structure, then ease of manufacture is improved, but area occupied by connection pad increases
Solution Approach 1:
The patent transitions from a traditional single-layer connection pad design to a multi-layer stacked structure, utilizing the vertical dimension to reduce the horizontal area occupied by connection pads. Multiple conductive layers are stacked vertically with insulating layers between them, allowing electrical connections to be established through the thickness direction rather than spreading out in the plane, thereby significantly reducing the area required for connection pads while maintaining manufacturing feasibility through standard multi-layer PCB processes.
Solution Approach 2:
The patent implements a nested structure where multiple conductive layers are stacked within a compact vertical space, with each layer containing connection pads and connection lines that are electrically isolated yet spatially integrated. The insulating layers act as containment structures that allow one conductive layer to be nested within the vertical envelope of another, creating a compact, space-efficient connection pad system that reduces overall area occupation.
2Area of stationary object
If connection pads occupy larger area, then ease of operation for testing is improved, but area available for display is reduced
Solution Approach 1:
The patent moves testing accessibility from the horizontal plane to the vertical dimension by stacking multiple conductive layers with external connection terminals accessible from the top and bottom surfaces. This allows testing equipment to access electrical properties through the thickness direction rather than requiring large lateral spaces, thereby maximizing the display area while maintaining ease of operation for electrical testing through vertically accessible connection points.
Solution Approach 2:
The patent segments the connection pad structure into multiple independent conductive layers, each with its own set of connection lines and terminals. This segmentation allows different layers to be tested independently through their respective external terminals, facilitating ease of operation for electrical property testing while keeping each individual layer compact, thereby preserving maximum display area.
3Area of stationary object
If multi-layer connection lines are used, then area occupied by connection pad is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent utilizes the vertical dimension to stack multiple conductive layers with insulating layers between them, creating a compact multi-layer connection pad structure. This approach reduces the horizontal area occupied by connection pads while employing standard multi-layer fabrication processes such as sequential deposition, patterning, and lamination, which are well-established in the industry and do not significantly increase manufacturing complexity.
Solution Approach 2:
The patent merges multiple conductive layers and insulating layers into an integrated multi-layer structure that is manufactured as a unified assembly. By combining the formation of connection pads, connection lines, and insulating layers into a coordinated multi-step manufacturing process using standard techniques, the patent achieves area reduction through vertical stacking without proportionally increasing overall manufacturing complexity.
Data Source
AI summary
An array substrate having a connection pad in a connection pad area is provided. The connection pad includes a plurality of first probe contact pads, a plurality of second probe contact pads, a plurality of first connection lines coupled to the plurality of first probe contact pads, respectively, and a plurality of second connection lines coupled to the plurality of second probe contact pads, respectively; the plurality of first connection lines and the plurality of second connection lines being in two different layers. A total number of conductive layers electrically connected to a respective first connection line of the plurality of first connection lines is different from a total number of conductive layers electrically connected to a respective second connection line of the plurality of second connection lines.