Multilayer Device Printed Dielectric Layer Parasitic Capacitance
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Solution Overview
Problem
Conventional ESD protection devices face challenges in minimizing parasitic capacitance due to high transmission frequencies, requiring complex and costly laser technology to punch apertures in dielectric layers, which leads to inaccuracies and increased production costs.
Innovation Solution
A multilayer device with internal electrodes surrounded by ceramic layers and a dielectric layer printed between them, reducing overlap area and parasitic capacitance, achieved through screen printing or inkjet printing of dielectric material like magnesium titanate, eliminating the need for laser punching and filler materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If laser technology is used to punch apertures in dielectric layers, then parasitic capacitance is reduced, but production cost and device complexity increase
Solution Approach 1:
The patent extracts the harmful dielectric material from the aperture region by printing the dielectric layer to intentionally exclude certain areas, thereby creating openings that reduce parasitic capacitance between internal electrodes without requiring post-processing aperture punching
Solution Approach 2:
The dielectric layer is printed in advance during the manufacturing process with pre-defined openings, eliminating the need for subsequent laser punching operations. This preliminary formation of the dielectric layer with integrated openings simplifies the overall production process
2Area of stationary object
If laser punching is used to create apertures, then overlap area is reduced, but manufacturing precision decreases due to inaccuracies
Solution Approach 1:
The patent replaces the mechanical laser punching process with a printing process for forming the dielectric layer. The printing method allows for precise control of the dielectric material deposition, creating accurate openings without the positioning inaccuracies associated with laser punching
Solution Approach 2:
The patent changes the method of forming the dielectric layer from mechanical removal (laser punching) to material deposition (printing). This parameter change in the manufacturing approach enables precise control of the opening geometry and position, improving manufacturing precision
3Object-affected harmful factors
If conventional dielectric layers with apertures are used, then parasitic capacitance is reduced, but production cost increases due to filler materials and additional steps
Solution Approach 1:
The printed dielectric layer inherently forms the required structure with integrated openings during the printing process itself, eliminating the need for additional steps such as aperture punching and filler material application. The process is self-contained and requires no subsequent modifications
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in a simple, inexpensive multilayer device with ultra-low capacitance, reduced material mix, and minimized production complexities, such as lamination issues and reject rates, while allowing precise geometry adaptation to component needs.
Implementation Method 1
The dielectric layer is printed onto at least one sub-region of one of the ceramic layers, for example, by means of screen printing or inkjet printing
Implementation Method 2
The dielectric layer is printed onto at least one sub-region of one of the ceramic layers, for example, by means of screen printing or inkjet printing
Data Source
AI summary
A multilayer device and a method for producing a multilayer device are disclosed. In an embodiment a multilayer device includes a main body having at least two external electrodes, at least one first internal electrode; at least one second internal electrode, wherein each internal electrode is electrically conductively connected to an external electrode, a plurality of ceramic layers, wherein the ceramic layers comprise the internal electrodes and at least one dielectric layer, wherein, viewed along a stack direction of the ceramic layers, the dielectric layer being arranged between the internal electrodes, and wherein the dielectric layer is printed onto at least one sub-region of one of the ceramic layers.

