Multilayer Display Wiring Layout for High-Resolution XR Panels
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Solution Overview
Problem
Display devices for XR applications require high display quality, reduced size, high definition, and high drive frequency, while facing challenges with increased pixel density, reduced input time per frame, and high power consumption.
Innovation Solution
A display device architecture with multiple layers, including a driver circuit, pixel array, and wiring configurations that optimize pixel connections and local driver circuits to reduce circuit area and power consumption, while maintaining high resolution and frame frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of pixels is increased to achieve high resolution, then display quality is improved, but the circuit area increases and power consumption increases
Solution Approach 1:
The display device is divided into multiple independent display regions, each with its own local driver circuit. This segmentation allows each region to be driven independently, reducing the overall circuit area required while maintaining high resolution across the entire display.
Solution Approach 2:
The patent transitions from a planar single-layer driver circuit layout to a three-dimensional multi-layer architecture. The driver circuit is distributed across multiple layers, with some portions placed above the pixel array, effectively utilizing vertical space to reduce the footprint of the circuit area.
2Measurement precision
If the drive frequency is increased to enhance immersion, then display quality is improved, but the input time per frame is reduced limiting data input
Solution Approach 1:
The display is divided into multiple regions that can be driven at different frequencies or with different data input schedules. This allows the system to maintain high overall frame frequency while allocating sufficient input time to each region, preventing data input bottlenecks.
Solution Approach 2:
Data for multiple frames is pre-loaded into buffer memory before the high-frequency display cycle begins. This preliminary action ensures that sufficient data is available to sustain high drive frequencies without compromising the input time requirement.
3Measurement precision
If the pixel size is reduced to increase pixel density, then display resolution is improved, but the circuit area per pixel increases
Solution Approach 1:
Multiple pixel circuits are merged into larger pixel groups or blocks that share common driver circuitry. This merging reduces the redundant circuit area per pixel while maintaining the high pixel density through the shared control structure.
Solution Approach 2:
The driver circuit is moved from the planar layer to vertical layers above the pixel array, reducing the horizontal circuit area per pixel and enabling higher pixel density without proportionally increasing the total circuit footprint.
4Area of stationary object
If local driver circuits are implemented to reduce circuit area, then device complexity increases
Solution Approach 1:
The local driver circuits are designed with universal, standardized architectures that can be replicated across multiple display regions. This universality reduces design complexity while achieving circuit area reduction through modular deployment.
Solution Approach 2:
The driver circuit architecture is organized in a nested hierarchy where simple local driver circuits are nested within larger regional control structures, which are in turn nested within the global display controller. This nested organization manages complexity by breaking down the control function into manageable layers.
Data Source
AI summary
A high-resolution display device in which delay of input signals to pixels is reduced is provided. In the display device, a first layer, a second layer, and a third layer are formed in this order from the bottom. The first layer includes a driver circuit and a plurality of first wirings, the second layer includes a plurality of first contact portions, and the third layer includes a pixel array and a plurality of second wirings. The pixel array includes a plurality of pixel circuits. The plurality of second wirings are parallel to each other and extended in the column direction of the pixel array, and the plurality of pixel circuits are electrically connected to the plurality of second wirings. The driver circuit includes a plurality of output terminals positioned along a first direction. The plurality of first wirings are extended perpendicular to the first direction, and the plurality of output terminals are electrically connected to the plurality of first wirings. The plurality of first wirings are electrically connected to the plurality of second wirings through the plurality of first contact portions.