Multi-Layer Gate Structure for DRAM GIDL Suppression
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Solution Overview
Problem
As Dynamic Random Access Memory (DRAM) units shrink, Gate Induced Drain Leakage (GIDL) increases, and the control ability of the gate is weakened due to smaller gate channel lengths, necessitating improved semiconductor structures to manage these issues.
Innovation Solution
A semiconductor structure featuring a gate structure with at least two gate conductive layers having the same components but different characteristic parameters, such as thickness, component content, or shape, to adjust threshold voltages and work functions, thereby reducing GIDL and enhancing control ability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If DRAM memory unit size is reduced, then storage density is improved, but Gate Induced Drain Leakage (GIDL) increases and gate control ability weakens
Solution Approach 1:
The gate structure is segmented into multiple gate conductive layers (first gate conductive layer and second gate conductive layer) with different work functions. This segmentation allows independent optimization of each layer's electrical characteristics, enabling better control over the channel while maintaining high storage density in scaled devices.
Solution Approach 2:
Different regions of the gate structure have different local qualities through the use of gate conductive layers with distinct work functions. The first gate conductive layer (e.g., TiN) and second gate conductive layer (e.g., WN) provide locally optimized electrical properties, with the lower-work-function layer enhancing control near the drain region to suppress GIDL while the higher-work-function layer provides overall gate control.
2Productivity
If gate channel length is reduced, then storage capacity is improved, but gate control ability and GIDL performance deteriorate
Solution Approach 1:
The gate structure is divided into multiple conductive layers with different work functions, allowing each layer to contribute differently to channel control. This segmentation enables effective gate control in short-channel devices by creating an optimized electric field distribution along the channel length, suppressing GIDL while maintaining high storage capacity.
Solution Approach 2:
The work function parameter is changed across different gate conductive layers to optimize device performance. By selecting materials with different work functions (e.g., TiN with higher work function and WN with lower work function), the electric field distribution in the channel is optimized to improve gate control ability and reduce GIDL in scaled devices with reduced channel lengths.
Data Source
AI summary
Provided is a semiconductor structure and a formation method therefor. The semiconductor structure includes: a gate structure located on a substrate. The gate structure includes at least two gate conductive layers; the at least two gate conductive layers have the same components and different characteristic parameters; and the characteristic parameter includes at least one of thickness, component content or shape.