Multilayer Polysilicon Gate Structure to Prevent Over-Etching
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Solution Overview
Problem
The formation of polysilicon gate structures in field effect transistors often results in over-etching issues due to the properties of polysilicon materials and etching processes, leading to reduced electrical performance and yield of semiconductor devices.
Innovation Solution
A semiconductor structure with a gate structure comprising a first conductive layer consisting of a first polysilicon layer adjacent to the substrate, a second polysilicon layer contiguous to a barrier layer, and a metal layer between them, which reduces the contact area with etching gas and etching time, ensuring a straight profile and improved electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a polysilicon gate structure is formed using conventional etching processes, then the gate structure can be manufactured, but over-etching occurs leading to non-straight profiles and reduced electrical performance
Solution Approach 1:
The gate structure is segmented into multiple conductive layers (first conductive layer, second conductive layer, third conductive layer) stacked in sequence. This segmentation allows each layer to be etched independently with controlled profiles, preventing the over-etching defects that occur in conventional single-layer polysilicon gate structures. The segmented design enables better control over the etching process and maintains straight profiles for improved electrical performance.
2Adaptability or versatility
If polysilicon material is used for the gate structure, then the work function is easy to modulate, but the material properties cause over-etching issues during the etching process
Solution Approach 1:
The gate structure employs a composite design combining multiple conductive layers (including polysilicon layers) with different properties. The first, second, and third conductive layers can be made of different materials or have different doping configurations, allowing work function modulation while the multi-layer structure itself provides resistance to over-etching. This composite approach maintains the advantages of polysilicon while mitigating its etching vulnerabilities.
3Device complexity
If the gate structure uses a single conductive layer, then the structure is simple, but electrical performance is reduced due to etching-related defects
Solution Approach 1:
The gate structure is divided into multiple conductive layers (first, second, and third conductive layers) that are stacked and patterned together. This segmentation provides several benefits: each layer can be optimized for specific functions, the multi-layer structure resists over-etching better than single layers, and the stacked configuration improves electrical performance by providing multiple conductive pathways. The complexity increase is justified by the significant improvement in reliability and electrical performance.
Data Source
AI summary
A semiconductor structure includes: a substrate; a gate structure located on the substrate, wherein the gate structure comprises a first conductive layer, a barrier layer and a second conductive layer which are stacked in sequence; wherein the first conductive layer includes a first polysilicon layer, a first metal layer and a second polysilicon layer, wherein the first polysilicon layer is adjacent to the substrate and the second polysilicon layer is contiguous to the barrier layer; and wherein the first metal layer is located between the first polysilicon layer and the second polysilicon layer. The gate structure of the embodiments of the application has a straight profile and an excellent electrical performance.