Multi-Layer Gate Electrode Pixel Structure for High Resolution Displays

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Solution Overview

Problem

Existing display devices face challenges in achieving high resolution due to the limited ability to reduce the size of pixels, which restricts the increase in the number of pixels in the display region.

Innovation Solution

A display device design that includes a light-emitting element and a specific configuration of transistors, where the (2-2)-th gate electrode and the (3-2)-th gate electrode are on different layers above the first gate electrode, allowing for a more compact pixel structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the number of pixels in the display region is increased to achieve high resolution, then the resolution is improved, but the pixel size must be reduced which increases manufacturing difficulty and structural complexity

Engineering Contradiction:
ImproveresolutionVSAvoidpixel structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies dimensionality change by stacking multiple gate electrodes (first gate electrode, second gate electrode, third gate electrode) in different layers above the substrate. This vertical stacking arrangement allows the transistor structure to be compact in the planar view while maintaining sufficient control over the channel, thereby reducing pixel size without compromising transistor performance and enabling higher resolution displays.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements nesting by placing the second gate electrode and third gate electrode within the vertical space above the first gate electrode. Multiple functional layers are nested within each other, with insulating layers separating the gate electrodes while allowing them to coexist in a compact vertical arrangement, maximizing space utilization within the pixel structure.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Measurement precision

If the pixel size is reduced to increase the number of pixels, then the resolution is improved, but the manufacturing precision requirements increase

Engineering Contradiction:
ImproveresolutionVSAvoidpixel fabrication precision
Core Design Contradiction:
Measurement precisionVSManufacturing precision

Solution Approach 1:

The patent segments the gate control function into multiple independent gate electrodes (first, second, and third gate electrodes) positioned at different layers. Each gate electrode can be independently formed and controlled, allowing for modular manufacturing processes. This segmentation reduces the complexity of forming a single large gate structure and enables more precise control over each individual gate component, thereby improving manufacturing precision despite reduced pixel dimensions.

Inventive Principle:
Principle #1Segmentation

3Area of moving object

If multiple gate electrodes are stacked in different layers to reduce pixel size, then the area is reduced, but the device complexity increases

Engineering Contradiction:
Improvepixel areaVSAvoidtransistor structure complexity
Core Design Contradiction:
Area of moving objectVSDevice complexity

Solution Approach 1:

The patent achieves multi-functionality by designing the stacked gate electrode structure to serve multiple purposes simultaneously: the first gate electrode controls the main current flow, while the second and third gate electrodes provide additional control and compensation functions. This universal structure replaces what would otherwise require separate transistor components, reducing the overall pixel area while the modular design keeps the complexity manageable through standardized layer formation processes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250204150A1Display device
Publication Date: 2025.06.19 SAMSUNG DISPLAY CO LTD
  • US20250204150A1 patent drawing
  • US20250204150A1 patent drawing
  • US20250204150A1 patent drawing

AI summary

A display device includes: a light-emitting element; a first transistor including a first semiconductor layer connected to a first power supply line and the light-emitting element, and a first gate electrode on the first semiconductor layer and connected to a first node; a second transistor including a second semiconductor layer connected to the first node and a second node, a (2-1)-th gate electrode on the second semiconductor layer, and a (2-2)-th gate electrode below the second semiconductor layer; a data line connected to the second node; and a third transistor including a third semiconductor layer connected to the second node and the light-emitting element, a (3-1)-th gate electrode on the third semiconductor layer, and a (3-2)-th gate electrode below the third semiconductor layer, wherein the (2-2)-th gate electrode and the (3-2)-th gate electrode are on layers above the first gate electrode, and are on different layers.