Multi-Layer Hard Mask Patterning for Precise Semiconductor Etching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in precise control of lithography across advanced technology process nodes, leading to issues such as disconnected landing pads and wiggling patterns due to multiple hard layers, which affect device performance and yield.
Innovation Solution
A method involving a multi-layer structure with specific layer thicknesses and etching operations is employed, including the formation of patterned layers with alternating arrangements and etching processes to improve patterning precision and avoid wiggling patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple hard layers are used in lithography patterning, then patterning capability is enhanced for advanced nodes, but wiggling patterns and disconnected landing pads occur reducing manufacturing precision
Solution Approach 1:
The patent divides the single thick hard mask layer into multiple thinner hard mask layers (first hard mask layer and second hard mask layer). This segmentation allows each layer to be independently patterned and controlled, preventing the wiggling pattern effect that occurs with single thick layers while maintaining the necessary patterning capability for advanced nodes.
Solution Approach 2:
The patent transitions from using a single thick hard mask layer to using multiple thin hard mask layers stacked vertically. This dimensional approach (distributing thickness across multiple layers) resolves the wiggling pattern issue by eliminating the single thick layer configuration that causes the problem, while still providing sufficient total mask thickness for advanced lithography.
2Device complexity
If single thick hard mask layer is used, then process complexity is reduced, but patterning precision deteriorates at advanced nodes
Solution Approach 1:
The hard mask structure is segmented into multiple thin layers instead of a single thick layer. This segmentation enables precise patterning at advanced nodes by avoiding the wiggling pattern effect, with each layer contributing to the overall pattern fidelity.
Solution Approach 2:
The patent employs a composite hard mask structure consisting of multiple hard mask layers with different materials or properties. This composite approach allows optimization of each layer's thickness and material characteristics to achieve superior patterning precision while managing process complexity.
3Manufacturing precision
If multiple patterned layers are formed with alternating arrangement, then pattern transfer accuracy is improved, but device complexity increases
Solution Approach 1:
The pattern transfer process is segmented into multiple stages using alternating first and second patterned layers. Each layer transfers a portion of the final pattern, and their alternating arrangement enables accurate composite pattern formation while distributing the complexity across manageable steps.
Solution Approach 2:
The patent utilizes vertical stacking of multiple patterned layers to achieve high-precision pattern transfer. By distributing the patterning function across multiple thin layers in the vertical dimension, the system achieves superior accuracy while keeping each individual layer's fabrication relatively simple.
Data Source
AI summary
The present disclosure provides a method of manufacturing a semiconductor structure. A substrate is provided. A multi-layer structure is formed over the substrate, wherein the multi-layer structure includes a semiconductive material layer and an oxide layer over the semiconductive material layer. The oxide layer is patterned to form a first patterned layer. A second patterned layer is formed on the semiconductive material layer and alternately arranged with the first patterned layer. A first etching operation is performed on the substrate using a comprehensive pattern of the first patterned layer and the second patterned layer.