Multilayer High Voltage Isolation Barrier in Integrated Circuit
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Solution Overview
Problem
Current digital isolators are limited to approximately 2.5 kV isolation voltage, which is insufficient for many industrial and medical applications requiring higher voltage isolation while maintaining cost-effectiveness and compact size.
Innovation Solution
The use of multiple layers of high-pressure laminate as an insulating barrier between the primary and secondary coils of an isolation transformer, specifically employing Bismaleimide Triazine (BT) laminate materials, to achieve higher voltage breakdown and isolation capabilities within a compact integrated circuit package.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional single-layer insulation materials (polyimide or SiO2) are used, then manufacturing is simple and cost is low, but isolation voltage is limited to about 400 V
Solution Approach 1:
The insulation barrier is segmented into multiple discrete layers (first laminate layer, second laminate layer, third laminate layer) rather than using a single thick layer. Each layer contributes to the total isolation voltage capability, allowing the system to achieve 6 kV or higher isolation by stacking multiple 2.5 kV-rated layers.
Solution Approach 2:
The patent uses composite laminate structures combining multiple insulating materials (polyimide, prepreg, BT laminate) with different electrical and mechanical properties. This composite approach allows optimization of both electrical performance (isolation voltage) and mechanical properties (flexibility, adhesion) while achieving higher voltage ratings.
2Reliability
If discrete coil wound transformers are used, then isolation voltage can reach approximately 2.5 kV, but device size becomes bulky and cost increases
Solution Approach 1:
The patent transitions from planar PCB-based transformer designs to a three-dimensional multilayer laminate structure. By stacking insulating layers vertically between primary and secondary coils, the design achieves higher isolation voltage in the vertical dimension rather than requiring larger horizontal spacing, thus reducing overall device footprint.
Solution Approach 2:
Multiple insulating layers are nested between the primary and secondary coils, with each layer contributing to the isolation barrier. The laminate structure allows compact nesting of multiple 2.5 kV-rated layers within a small volume to achieve 6 kV or higher isolation capability.
3Reliability
If high-pressure laminate materials are used, then isolation voltage exceeds 6 kV, but manufacturing complexity increases
Solution Approach 1:
The patent specifies precise parameter ranges for the laminate materials (breakdown voltage of 100-120 V/μm, thickness of 15-25 μm per layer) to ensure consistent electrical performance. By controlling these parameters, the manufacturing process achieves high isolation voltage while maintaining repeatability and quality control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables isolation voltages exceeding 6 kV, providing robust high-voltage isolation while reducing costs and maintaining a small footprint, with improved manufacturability and performance compared to traditional materials.
Implementation Method 1
a first laminate layer of a multilayer laminate substrate may be positioned between a primary coil and a secondary coil to provide electrical isolation between the primary coil and the secondary coil. The multilayer laminate substrate may have a breakdown voltage of 100-120 V/μm
Implementation Method 2
a transformer may be implemented using patterned metal layers on a silicon substrate with polyimide or SiO2 insulation between the metal layers. Current pulses in a primary coil on one layer create magnetic fields to induce current on a secondary coil on a second layer
Data Source
AI summary
A semiconductor package is provided that has a transformer formed within a multilayer dielectric laminate substrate. The transformer has a first inductor coil formed in one or more dielectric laminate layers of the substrate, a second inductor coil formed in one or more dielectric laminate layers of the substrate, and an isolation barrier comprising two or more dielectric laminate layers of the multilayer substrate positioned between the first inductor coil and the second inductor coil. The transformer may be mounted on a lead frame along with one or more integrated circuits and molded into a packaged isolation device.