Multilayer MOSFET Channel Structure for Scaled Device Mobility

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Solution Overview

Problem

As semiconductor devices are scaled down, the operating characteristics of MOSFETs deteriorate, necessitating advancements to maintain performance and overcome integration limitations.

Innovation Solution

The semiconductor device incorporates a substrate with an active pattern, a channel structure comprising different semiconductor materials for the upper, lower, and intervening channel layers, along with a gate electrode and source/drain patterns, to enhance performance by optimizing the channel structure and material combinations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the size and design rule of the semiconductor device are decreased, then the integration density is improved, but the operating characteristics of MOSFETs deteriorate

Engineering Contradiction:
Improveintegration densityVSAvoidoperating characteristics
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The channel structure is segmented into multiple layers (first channel layer, second channel layer, third channel layer) with different semiconductor materials. Each layer can be independently optimized for specific functions, allowing the device to maintain high integration density while preserving excellent operating characteristics through material diversity and structural segmentation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs composite materials by combining different semiconductor materials (e.g., SiGe, Si, Ge) in a multi-layer channel structure. This composite approach enables each layer to contribute its unique properties, achieving both high integration density and superior MOSFET operating characteristics that cannot be obtained with single-material channels.

Inventive Principle:
Principle #40Composite materials

2Reliability

If a multi-layer channel structure with different semiconductor materials is used, then the carrier mobility is improved, but the device complexity increases

Engineering Contradiction:
Improvecarrier mobilityVSAvoidchannel structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Different semiconductor materials are assigned to different local regions (layers) of the channel structure based on their specific properties. The first, second, and third channel layers each have tailored material compositions optimized for their local functional requirements, enabling high carrier mobility through localized material optimization rather than uniform complexity throughout the entire device.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration improves carrier mobility and electrical properties, allowing the channel structures to function effectively as both NMOSFET and PMOSFET channels with reduced surface roughness and increased mobility.

Implementation Method 1

providing compressive and tensile stresses to the channel layers, enhancing electron flow

Methodology Applied
Scientific EffectStress:

Data Source

PatentUS20240387717A1Semiconductor device including an active pattern
Publication Date: 2024.11.21 SAMSUNG ELECTRONICS CO LTD
  • US20240387717A1 patent drawing
  • US20240387717A1 patent drawing
  • US20240387717A1 patent drawing

AI summary

A semiconductor device includes: a substrate including an active pattern; a first channel structure overlapping the active pattern; a gate electrode including an electrode portion between the active pattern and the first channel structure; a semiconductor layer contacting the first channel structure; and a source/drain pattern contacting the first channel structure, wherein the first channel structure includes: a first upper channel layer; a first lower channel layer; and a first intervening channel layer disposed between the first upper channel layer and the first lower channel layer, wherein the semiconductor layer contacts a sidewall of the first upper channel layer, a sidewall of the first lower channel layer, and a sidewall of the first intervening channel layer, and wherein the semiconductor layer and the first intervening channel layer include a semiconductor material that is different from a semiconductor material of the first upper channel layer and the first lower channel layer.