Multi-Layer OTS Selector Structure for Low-Leakage Memory Arrays
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Solution Overview
Problem
Parasitic resistance in bit lines and word lines of memory devices leads to performance degradation, increasing the risk of errors due to reduced margin between logic states in memory cells.
Innovation Solution
Implementing a memory device with an OTS selector comprising multiple layers of low and high bandgap OTS materials, where the low bandgap OTS layers are in direct contact with electrodes and the high bandgap OTS layers are adjacent, to achieve low leakage current and reduced threshold voltage, thereby improving the switching performance and reducing errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single OTS layer is used in the selector, then the device complexity is low, but the leakage current is high and the threshold voltage is not optimized
Solution Approach 1:
The selector is divided into multiple OTS layers (first OTS layer and second OTS layer) with different bandgaps instead of using a single uniform layer. This segmentation allows each layer to contribute differently to the overall electrical characteristics, achieving low leakage current while maintaining manageable device complexity through modular architecture.
Solution Approach 2:
The patent employs a composite structure combining OTS layers with different bandgaps (first bandgap and second bandgap) to create a selector with optimized electrical properties. This composite approach enables simultaneous achievement of low leakage current and appropriate threshold voltage by leveraging the complementary characteristics of different materials.
2Reliability
If the threshold voltage is reduced to improve read margin, then the read margin increases, but the leakage current increases
Solution Approach 1:
Different OTS layers are assigned different bandgap characteristics tailored to specific functional requirements. The first OTS layer with first bandgap and the second OTS layer with second bandgap are positioned and configured to provide localized electrical properties that collectively achieve both low leakage current and appropriate threshold voltage for improved read margin.
Solution Approach 2:
The patent utilizes parameter changes by selecting OTS materials with different bandgap values and adjusting their respective thicknesses (first thickness and second thickness). By optimizing these parameters, the device achieves a threshold voltage that provides sufficient read margin while maintaining low leakage current through the engineered bandgap structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The multi-layer OTS selector structure achieves low leakage current and low threshold voltage, enhancing the reliability and accuracy of memory operations by maintaining a larger read margin and reducing power consumption in memory arrays.
Implementation Method 1
The use of multiple layers of OTS materials, comprising at least one low bandgap and one high bandgap OTS layer, in the OTS selector to achieve low leakage current and relatively low threshold voltage
Data Source
AI summary
A memory device is provided in various embodiments. The memory device, in those embodiments, has an ovonic threshold switching (OTS) selector comprising multiple layers of OTS materials to achieve a low leakage current and as well as relatively low threshold voltage for the OTS selector. The multiple layers can have at least one layer of low bandgap OTS material and at least one layer of high bandgap OTS material.