Multilayer Package Structure with Embedded Thermal Conduction

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Solution Overview

Problem

Conventional package structures for electronic components, such as single-layered SIP, LGA, and BGA, face challenges with heat dissipation efficiency, high fabricating costs, and limited power density due to their design limitations, which hinder the development of compact and efficient electronic devices.

Innovation Solution

A multilayered package structure with embedded thermal conduction structures that utilize conductive layers and vias to facilitate heat dissipation in both vertical and horizontal directions, enhancing heat dissipation efficiency while reducing fabricating costs and increasing power density through high-density integration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If a single in-line package structure (SIP) is used, then the heat dissipation capability is good, but the layout area becomes very large and occupies much space

Engineering Contradiction:
Improveheat dissipation capabilityVSAvoidlayout area
Core Design Contradiction:
TemperatureVSArea of stationary object

Solution Approach 1:

The patent transitions from a conventional single-layer planar layout to a three-dimensional multilayered structure. Electronic components are distributed across multiple insulation layers (first insulation layer, second insulation layer, third insulation layer) stacked vertically, with conductive vias providing electrical connections between layers. This vertical stacking enables high-density integration while maintaining effective heat dissipation pathways through the layered structure, thereby reducing the horizontal layout area while preserving thermal management capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If electronic components are arranged on the same layer of the printed circuit board, then the layout area is compact, but the line impedance is high and parasitic effects are easily generated

Engineering Contradiction:
Improvelayout areaVSAvoidelectrical properties
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent distributes electronic components across multiple vertical layers rather than confining them to a single plane. The first, second, and third insulation layers are stacked with conductive vias penetrating through them, creating a three-dimensional electrical interconnection network. This vertical arrangement shortens the horizontal trace lengths between components, reducing line impedance and parasitic effects while maintaining compact footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If a single-layered package structure is used, then the manufacturing process is simple, but the power density is insufficient

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidpower density
Core Design Contradiction:
Ease of manufactureVSQuantity of substance

Solution Approach 1:

The patent divides the package structure into multiple discrete insulation layers (first, second, and third insulation layers) separated by conductive layers and interconnected by vias. This segmentation allows independent fabrication and assembly of each layer, enabling high-density component placement in three dimensions without significantly complicating the manufacturing process. Each layer can be prepared and tested separately before final assembly, maintaining manufacturing simplicity while achieving high power density through vertical stacking.

Inventive Principle:
Principle #1Segmentation

4Ease of manufacture

If conventional package structures are used, then the fabricating cost is high, but the heat dissipation efficiency is insufficient

Engineering Contradiction:
Improvefabricating costVSAvoidheat dissipation efficiency
Core Design Contradiction:
Ease of manufactureVSTemperature

Solution Approach 1:

The patent integrates multiple functions into the multilayered structure: the insulation layers provide both electrical isolation and thermal management pathways, the conductive vias serve dual purposes of electrical connection and heat conduction, and the layered architecture simultaneously achieves high-density integration and effective heat dissipation. This multi-functionality reduces the need for separate dedicated heat sink structures, lowering overall fabrication cost while improving heat dissipation efficiency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed package structure effectively enhances heat dissipation efficiency, reduces fabricating costs, and increases power density by allowing for efficient heat transfer and electrical connectivity, thereby addressing the limitations of conventional designs.

Implementation Method 1

at least one embedded thermal conduction structure for dissipating heat away from plural electronic components

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS9107290B1Package structure and stacked package module with the same
Publication Date: 2015.08.11 DELTA ELECTRONICS INTL SINGAPORE
  • US9107290B1 patent drawing
  • US9107290B1 patent drawing
  • US9107290B1 patent drawing

AI summary

A package structure includes two insulation layers, three conductive layers, and two electronic components. The first and second conductive layers are disposed on a top surface and a bottom surface of the first insulation layer, respectively. The second insulation layer is disposed over the first conductive layer. The third conductive layer is disposed on a top surface of the second insulation layer. The first and second electronic components are embedded within the first and second insulation layers, respectively. The first conducting terminals of the first electronic component are electrically connected with the first conductive layer and the second conductive layer through at least one first conductive via and at least one second conductive via. The second conducting terminals of the second electronic component are electrically connected with the first conductive layer and/or electrically connected with the third conductive layer through at least one third conductive via.