Multilayer PCB Pin Holder Integration for Reliable Die Interconnection
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Solution Overview
Problem
Pin and pin holder interconnections in semiconductor die packaging are prone to defects such as solder splash, pin tilt deformation, and holder failure, leading to performance degradation or unusable products.
Innovation Solution
A multilayer printed circuit board with embedded pin holders and die contacts, utilizing interconnection structures and auxiliary connectors to stabilize and enhance the interconnection between pins and semiconductor dies, reducing mechanical stress and improving connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If pin and pin holder interconnection is used to connect semiconductor die to circuit board, then interconnection function is achieved, but defects such as solder splash, pin tilt deformation, and holder failure occur frequently
Solution Approach 1:
The patent introduces a pin holder embedded in the multilayer substrate as an intermediary component between the pin and the circuit board. This pin holder serves as a mediator that absorbs mechanical stress, prevents pin tilt deformation, and eliminates solder splash issues by providing a stable mounting structure within the substrate rather than using traditional external pin holders.
Solution Approach 2:
The patent transitions from a traditional two-dimensional surface mounting approach to a three-dimensional embedded structure. The pin holder is embedded within the multilayer substrate, utilizing the vertical dimension (depth) to provide structural support and stability, thereby preventing pin deformation and failure modes that occur with surface-mounted solutions.
2Ease of manufacture
If traditional pin holder structure is used, then pin interconnection is achieved, but the pin holder and pin are fragile and easy to be damaged during pressing/plugging and welding processes
Solution Approach 1:
The patent merges the pin holder with the multilayer substrate itself, creating an integrated structure where the pin holder becomes an inherent part of the substrate rather than a separate component. This integration strengthens the overall structure, eliminating the fragility of separate pin holders during pressing and welding operations.
Solution Approach 2:
The multilayer substrate utilizes composite material construction with multiple layers providing structural reinforcement. The embedded pin holder benefits from the composite nature of the substrate, which distributes and absorbs mechanical stresses, thereby preventing damage to the pin and holder during the manufacturing process.
3Reliability
If pin and pin holder are used for interconnection, then connectivity between semiconductor die and circuit board is established, but the welding process is complicated and various defects occur
Solution Approach 1:
The patent extracts the welding process from the pin interconnection procedure. By using embedded pin holders that provide direct mechanical and electrical contact within the substrate, the complex multi-step welding process (including solder application, reflow, and inspection) is eliminated, replaced with a simpler insertion and bonding process.
Data Source
AI summary
A multilayer printed circuit board for interconnecting pin(s) and semiconductor die(s) is provided. A multilayer printed circuit board for interconnecting pin(s) and semiconductor die(s) comprises a multilayer substrate and pin holder(s), die contact(s), and first interconnection structure(s) embedded in the multilayer substrate. The multilayer substrate comprises a bottom substrate layer, one or more core substrate layers, and a top substrate layer stacked in sequence. and each made of an insulating material. Each of the pin holder(s) has an end exposed from a top surface of the top substrate layer for plugging the pin into the pin holder Each of the die contact(s) has an end exposed from a bottom surface of the bottom substrate layer for being electrically coupled with a contact of the semiconductor die(s) Each of the first interconnection structure(s) is connected between and electrically couples a corresponding pin holder and a corresponding die contact.


