Multilayer Differential Pair Routing for Equal-Length PCB Traces
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Solution Overview
Problem
Existing side-exit paddle cards face issues with unequal lengths of differential pairs due to mechanical limitations, leading to signal transmission delays, asymmetrical structures, and high attenuation, particularly at corners where sufficient serpentine wiring is not feasible.
Innovation Solution
A circuit board design that uses a staggered trace structure on different layers through vias to equalize the lengths of differential pairs, eliminating the need for serpentine wiring and ensuring parallel and equidistant traces, thereby improving common-mode conversion and reducing attenuation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If serpentine wiring is used to equalize differential pair lengths, then signal transmission delay difference is reduced, but trace asymmetry increases causing poor common-mode conversion and high attenuation
Solution Approach 1:
The patent transitions from 2D planar serpentine wiring to 3D multi-layer routing, allowing traces to achieve equal lengths by utilizing vertical dimension through layer transitions while maintaining parallel and equidistant relationships in the planar view, thus avoiding asymmetry issues
Solution Approach 2:
The differential pair traces are divided into multiple segments across different layers, with each segment contributing to the overall equal length path. The routing is segmented into straight portions and via transitions, allowing precise control of trace lengths while maintaining symmetry
2Manufacturing precision
If serpentine wiring is used to compensate for short-distance traces near corners, then differential pair length equality is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
Instead of creating complex 2D serpentine patterns, the patent uses 3D multi-layer routing to achieve length equality through vertical transitions, significantly simplifying the routing geometry and reducing manufacturing complexity while maintaining precise length control
3Area of stationary object
If traces are routed asymmetrically to accommodate corner constraints, then area utilization is improved, but signal quality deteriorates due to non-parallel and non-equidistant structures
Solution Approach 1:
The patent maintains parallel and equidistant trace relationships in the planar view by utilizing the vertical dimension for length compensation. Traces remain symmetrically positioned on each layer, preserving signal quality while accommodating corner constraints through layer transitions
Data Source
AI summary
A circuit board includes a pair of first signal terminals, a pair of second signal terminals, a first trace, and a second trace. The pair of first signal terminals include a first terminal and a second terminal. The pair of second signal terminals include a third terminal and a fourth terminal. A distance between the first terminal and the fourth terminal is not equal to a distance between the second terminal and the third terminal. A length of the first trace is substantially equal to a length of the second trace. The first trace and the second trace extend to a second specific layer through vias from a first specific layer of the circuit board so that the first terminal is electrically connected to the third terminal and the second terminal is electrically connected to the fourth terminal.