Multilayer PCB Via Routing for Compact Disk-Device Wiring
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Solution Overview
Problem
The limitations in the dimensions and installation space of flexible printed circuit boards (FPCs) hinder the increase in the number of wirings, connection terminals, and electronic components, which are necessary for higher recording density and reliability in magnetic disk devices.
Innovation Solution
A multilayer printed circuit board design with reinforcing patterns on mounting pads and conductive vias that reduce the number of surface wirings and enhance solder bondability, allowing for a more compact layout and efficient connection of electronic components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the number of wirings and connection pads is increased to support multi-functionalization and higher recording density, then the reliability and recording density are improved, but the installation space and dimensions of the FPC are exceeded
Solution Approach 1:
The patent transitions from planar wiring arrangements to three-dimensional multilayer wiring structures. By utilizing multiple layers (first wiring layer, second wiring layer, third wiring layer) and vertical vias, the connection density is dramatically increased without expanding the FPC footprint. This dimensional transition allows dozens of connections to be packed into a compact area, resolving the contradiction between reliability and installation space.
Solution Approach 2:
The patent implements nested wiring structures where multiple wiring layers are stacked vertically within the FPC thickness. The first, second, and third wiring layers are arranged in sequence with vias connecting them, creating a nested configuration that maximizes connection density within the available volume. This nesting approach allows numerous connection pads to be integrated into a compact FPC structure.
2Quantity of substance
If the number of wirings is increased to support more heads and functions, then the recording density is improved, but the head IC size increases and downsizing is hindered
Solution Approach 1:
The patent resolves the contradiction by moving from two-dimensional surface wiring to three-dimensional multilayer wiring. The vertical stacking of wiring layers and use of vias allow the head IC to maintain numerous connections without increasing its planar footprint. This dimensional transition enables high connection density while preserving compact IC size.
Solution Approach 2:
The patent segments the wiring into distinct layers (first wiring layer, second wiring layer, third wiring layer) with specific functions. This segmentation allows optimized routing and connection patterns that reduce interference and improve signal integrity while maintaining compact dimensions. The segmented approach enables efficient use of available space within the head IC.
3Area of stationary object
If conventional FPC design is used with limited dimensions, then the installation space is constrained, but the number of connection pads and mounting pads cannot be increased
Solution Approach 1:
The patent dramatically increases the effective area for connections by utilizing the third dimension (vertical depth). Multiple wiring layers stacked vertically provide numerous connection pads within the same planar footprint. This dimensional transition allows the FPC to maintain compact installation space while supporting a large number of connection pads for multi-functionalization.
Solution Approach 2:
The patent employs composite FPC structures with multiple layers of conductive and insulating materials stacked together. This composite construction enables high-density wiring and numerous connection pads within a compact thickness. The layered composite structure maximizes the use of available space while maintaining electrical performance and mechanical integrity.
Data Source
AI summary
According to one embodiment, a printed circuit board includes a first conductive layer on an insulating layer, including connection pads, a first mounting pad, a second mounting pad, a second wiring connecting the first mounting pad and one of the connection pads, and a first reinforcing pattern extending from the second mounting pad, a second conductive layer on another surface of the insulating layer, including a third wiring connected to one of the connection pads, and a conductive via connecting the second mounting pad and the third wiring. The second conductive layer includes a pad portion on the third wiring, opposed to the second mounting pad, and a third reinforcing pattern extending from the pad portion and opposed to the first reinforcing pattern.