Multilayer Electronic Component Porosity Layout for Crack Suppression
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Solution Overview
Problem
Multilayer ceramic capacitors are prone to cracks during mounting and use due to the brittleness of ceramics, and these cracks can be generated or propagated during the sintering process, leading to reliability issues.
Innovation Solution
The multilayer electronic component incorporates a body with a dielectric layer and alternately disposed internal electrodes, featuring disconnection portions that include pores or dielectric material, with controlled porosity to suppress crack generation and propagation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the multilayer ceramic capacitor is manufactured using conventional sintering processes, then the manufacturing process is simple and fast, but cracks are generated or propagated during sintering, reducing reliability
Solution Approach 1:
The patent applies local quality by creating disconnection portions with specific pore characteristics at particular locations within the internal electrode. The pore size, distribution, and porosity are locally optimized in the disconnection portions rather than uniformly throughout the entire electrode, allowing crack suppression at critical locations while maintaining overall manufacturing simplicity
Solution Approach 2:
The patent utilizes porous materials by intentionally forming pores within the disconnection portions of the internal electrode. These pores have specific size ranges (0.1-10 μm) and porosity ratios (Dm/Dc < 0.79) that prevent crack propagation while being formed through controlled sintering processes, thus improving reliability without excessive manufacturing complexity
2Reliability
If the porosity of disconnection portions is increased to suppress cracks, then crack propagation is reduced, but the structural integrity and electrical performance may deteriorate
Solution Approach 1:
The patent applies parameter changes by precisely controlling the porosity parameters within specific ranges. The porosity ratio Dm/Dc is maintained below 0.79, with Dm (porosity at end portion) being 40% or less and Dc (porosity at central portion) being 60% or less. These parameter constraints ensure crack suppression while preserving structural integrity and electrical performance
Solution Approach 2:
The patent implements local quality by creating non-uniform pore distribution within the disconnection portions. The pore density and size vary between the central portion and end portion of the internal electrode, with higher porosity allowed at the center and lower porosity at the ends, optimizing both crack suppression and structural strength locally
Data Source
AI summary
A multilayer electronic component may include: a body including a dielectric layer and internal electrodes alternately disposed in a first direction; and an external electrode disposed on the body and connected to the internal electrode, wherein the internal electrode may include a plurality of electrode portions and disconnection portions, and the disconnection portion may include at least one of a dielectric and a pore.