Multi-layer Potting for LED Modules
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Solution Overview
Problem
LED-based lighting fixtures experience premature solder joint failures due to the expansion and contraction of silicone potting materials, which apply significant forces to solder joints, leading to fractures and arcing, resulting in circuitry failures.
Innovation Solution
A multilayer potting scheme is introduced, featuring a stress mitigation layer with a lower hardness and modulus than the potting layer, along with clinched and formed leads, to absorb and distribute thermal expansion forces, reducing the stress on solder joints. The stress mitigation layer is applied over the PCB, and the potting layer is applied over both the stress mitigation layer and electronic components, enhancing thermal conductivity and reducing solder joint fractures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If silicone potting material is used to protect electronic components, then protection from environmental elements is improved, but solder joint reliability deteriorates due to thermal expansion forces
Solution Approach 1:
The potting structure is segmented into multiple layers with different material properties. The first potting layer (softer, lower modulus) is positioned between the PCB and the second potting layer (harder, higher modulus). This segmentation allows the softer first layer to absorb thermal expansion forces while the harder second layer provides structural support and environmental protection, thereby protecting solder joints without compromising reliability.
Solution Approach 2:
The invention uses composite material structure with two distinct potting layers having different mechanical properties. The first potting layer has lower hardness and modulus (e.g., 20-40 Shore A) while the second potting layer has higher hardness and modulus (e.g., 40-60 Shore A). This composite approach combines the benefits of soft materials (stress absorption) with hard materials (structural integrity and environmental protection), resolving the contradiction between protection and reliability.
2Ease of manufacture
If single-layer potting is used to simplify manufacturing, then manufacturing complexity is reduced, but solder joint protection is insufficient under thermal cycling
Solution Approach 1:
The potting process is segmented into two distinct pouring steps: first pouring the softer first potting layer material, then pouring the harder second potting layer material on top. This segmentation enables differential stress management where each layer performs a specific function, providing superior solder joint protection under thermal cycling compared to single-layer potting, while maintaining reasonable manufacturing complexity.
Solution Approach 2:
The invention changes the material parameters (hardness, modulus) of the potting layers by using different silicone formulations or additive combinations. The first layer uses softer material (lower crosslink density or different base polymer) while the second layer uses harder material (higher crosslink density or reinforced formulation). This parameter differentiation enables the multi-layer structure to withstand thermal expansion forces better than uniform single-layer potting.
3Strength
If harder potting material is used to increase structural support, then structural integrity is improved, but stress on solder joints increases during thermal expansion
Solution Approach 1:
The structural support function is segmented between two layers: the first potting layer (softer) is positioned to directly support the PCB and absorb expansion forces, while the second potting layer (harder) provides overall structural integrity and positioning for electronic components. This segmentation allows each layer to optimize its mechanical properties for its specific function, reducing stress on solder joints while maintaining structural support.
Solution Approach 2:
Different local qualities (hardness levels) are assigned to different regions/layers of the potting structure. The first layer near the PCB has lower hardness (20-40 Shore A) to minimize stress on solder joints, while the second layer has higher hardness (40-60 Shore A) for structural support. This local quality differentiation resolves the contradiction between structural integrity and stress reduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution significantly reduces solder joint fractures and extends the lifespan of electronic modules by withstanding over 600 temperature cycles between -40°C and 105°C, improving the reliability of LED-based lighting fixtures.
Implementation Method 1
the expansion and contraction of the silicone results in significant and repetitive forces being imparted on the electronic components that are mounted to the PCBs
Implementation Method 2
The stress mitigation layer is a silicone gel or like material that has a material hardness of less than 65 on a Shore type 00 scale
Implementation Method 3
The potting material helps to dissipate heat generated by the electronic components
Implementation Method 4
A plurality of leads may extend from the body and through corresponding ones of the plurality of vias, wherein solder joints electrically and mechanically affix the plurality of leads within the corresponding ones of the plurality of vias
Data Source
AI summary
An electronics module, such as driver modules for LED-based lighting fixtures and the like, includes a printed circuit board (PCB), a stress mitigation layer, and a potting layer. The PCB has a plurality of vias, which extend through the printed circuit board. A plurality of electronic components may each have a body and a plurality of leads extending from the body and through corresponding ones of the plurality of vias, wherein solder joints electrically and mechanically affix the plurality of leads within the corresponding ones of the plurality of vias. The stress mitigation layer is applied over a top surface of the printed circuit board. The potting layer is applied over the stress mitigation layer and the plurality of electronic components.


