Multilayer Power Package Layout for Parallel WBG Thermal Symmetry
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Solution Overview
Problem
Conventional semiconductor die packaging limits the parallelization of devices, resulting in parasitic asymmetries and high thermal impedance, which hinders the full exploitation of Wide Band Gap (WBG) devices.
Innovation Solution
A semiconductor device package utilizing a multilayer substrate structure with semiconductor dies embedded in an intermediate layer, reducing heat flow resistance and incorporating bus bar components and PCBs for improved thermal management and symmetry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional wire-bonded packaging is used, then the packaging structure is simple and easy to manufacture, but the degree of parallelization of devices is limited and parasitic asymmetries occur
Solution Approach 1:
The patent transitions from a conventional planar wire-bonded packaging structure to a three-dimensional multilayer substrate structure. Semiconductor dies are embedded within the intermediate layer of the multilayer substrate, allowing devices to be arranged in multiple layers and dimensions. This dimensional change enables higher degrees of parallelization while maintaining symmetrical power loop inductance, as devices can be systematically positioned across multiple layers to achieve balanced current paths.
2Manufacturing precision
If multilayer substrate structure with embedded dies is used, then device parallelization and symmetry are improved, but thermal impedance increases and heat dissipation becomes less effective
Solution Approach 1:
The patent introduces a thermally conductive intermediate layer as a mediator between the semiconductor dies and the heat sink. This intermediate layer serves as a thermal pathway that efficiently conducts heat away from the embedded devices. By selecting materials with high thermal conductivity for the intermediate layer and optimizing its thickness, the design achieves effective heat dissipation while maintaining the multilayer structural benefits for device parallelization and symmetry.
3Power
If devices are arranged in parallel to exploit WBG device benefits, then device functionality and performance are enhanced, but thermal management becomes more challenging due to increased heat generation
Solution Approach 1:
The patent segments the thermal management system into multiple independent pathways by providing separate first and second heat sinks coupled to different regions of the intermediate layer. This segmentation allows heat from different device regions to be dissipated through dedicated thermal paths, preventing heat accumulation and improving overall thermal management efficiency. The segmented approach enables effective cooling of high-power parallel WBG devices while maintaining their performance benefits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables high symmetry and efficient heat dissipation, allowing for the full benefits of parallel WBG devices while maintaining low thermal impedance, thus overcoming the limitations of conventional packaging.
Implementation Method 1
An intermediate layer is provided between the top and bottom layers. A first heat sink is coupled to the intermediate layer below the first semiconductor die and a second heat sink is coupled to the intermediate layer below the second semiconductor die.
Data Source
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AI summary
A semiconductor device package comprising a multilayer substrate including a top layer (60), a bottom layer (70) and an intermediate layer (40) between the top layer and the bottom layer, and one or more semiconductor dies (30) embedded in the intermediate layer, and further comprising conductive connector means to provide a conductive connection from the one or more dies, the conductive connector means extending through the top layer to provide connection means for one or more devices mounted on or adjacent the top layer.