Multilayer Printhead Substrate Circuit Stacking
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Solution Overview
Problem
The existing printing technologies face challenges in reducing the size of multilayer structured element substrates while maintaining high-quality printing, as the size of the element substrates increases due to the arrangement of circuits at the connecting portions, leading to differences in air flow strength and ink landing position shifts, especially at higher print medium conveyance speeds.
Innovation Solution
A multilayer structured element substrate design where a dummy element and its driving circuit are positioned to overlap partially, allowing for a smaller circuit area for the dummy element and reducing the length between connecting portions of adjacent substrates, thereby minimizing the size of the element substrate and improving printing quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If circuits are arranged at the connecting portions of element substrates, then the element substrate can be assembled into a full-line printhead, but the size of the element substrate increases
Solution Approach 1:
The patent applies dimensionality change by arranging circuits in the vertical direction (stacking) rather than only in the horizontal plane. Multiple circuits are positioned at different heights above the substrate, allowing more circuits to be accommodated without increasing the substrate's planar area. This resolves the contradiction by enabling full-line printhead functionality while maintaining compact substrate size.
Solution Approach 2:
The patent implements nesting by placing circuits in a hierarchical structure where smaller circuits are positioned within the vertical space occupied by larger circuits. The circuits are arranged in overlapping vertical layers, with upper circuits positioned within the projection area of lower circuits, effectively nesting multiple circuit layers within the same horizontal footprint.
2Ease of manufacture
If the element substrate size is reduced, then production cost decreases, but the length between connecting portions of adjacent substrates increases
Solution Approach 1:
The patent uses vertical stacking to reduce the horizontal footprint of each element substrate. By arranging circuits in multiple vertical layers, the substrate can be made smaller in planar dimensions while maintaining all necessary circuit functionality. This allows adjacent substrates to be positioned closer together, reducing the distance between connecting portions.
3Area of stationary object
If the length between connecting portions is long, then element substrate size can be reduced, but air flow strength differences cause ink landing position shifts
Solution Approach 1:
The patent compensates for the effects of longer distances between connecting portions by using vertical circuit stacking. This allows the substrate to be smaller overall while positioning connecting portions at optimized locations. The vertical arrangement enables better control over air flow characteristics and ink droplet trajectory, maintaining printing precision even when horizontal distances are adjusted.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces the size of the element substrate and shortens the length between connecting portions, enhancing image quality by minimizing ink land position shifts and maintaining high-quality printing even at increased print speeds.
Implementation Method 1
causing ink droplets to be discharged onto a print medium by ink film boiling by supplying an electric current to heat each heater
Implementation Method 2
supplying an electric current to heat each heater
Data Source
AI summary
According to one embodiment, a size of an element substrate is reduced, and a printhead using the element substrate can print high-quality image. The multilayer structured element substrate comprises a plurality of print elements, and a circuit configured to input a data signal and a clock signal used for driving the plurality of print elements. And, a print element array formed by arranging the plurality of print elements in line is diagonally arranged with respect to a side constituting an outer shape of the element substrate. A print element at one end of the print element array is a dummy element not contributing to printing. The circuit is provided not only at the same position as that of the dummy element but also in a layer different from that of the dummy element.