Multilayer Select Device for High Current Density Memory Arrays
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Solution Overview
Problem
Conventional select devices in integrated circuitry face limitations in achieving high current densities and voltage tunability, particularly at low thicknesses, which restricts their performance in memory arrays and cell technologies.
Innovation Solution
The development of a select device with a p-n junction structure of varying thicknesses, typically less than 700 Angstroms, allowing for high current densities up to 1×e8 amps/cm2 and voltage tunability from zero to six volts, using a semiconductor construction with doped regions and specific electrode materials, enabling efficient charge transport mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the thickness of the select device structure is reduced to achieve higher current densities, then current density increases, but voltage control and tunability are lost
Solution Approach 1:
The select device structure is divided into multiple doped regions (first n-doped region, p-doped region, second n-doped region) with different thicknesses. This segmentation allows each region to contribute differently to charge transport, enabling high current density through thin regions while maintaining voltage control through the overall multi-layer structure.
Solution Approach 2:
Different regions of the select device are doped with different doping concentrations and thicknesses to create localized properties. The first and second n-doped regions have different doping concentrations than the p-doped region, creating optimal local conditions for charge injection and transport while maintaining overall device tunability.
2Device complexity
If conventional select devices are used in memory arrays, then device simplicity is maintained, but performance in cross-point arrays is limited
Solution Approach 1:
The select device utilizes adjustable parameters including doping concentrations, region thicknesses, and material compositions to optimize performance for specific memory array applications. These parameter variations enable the device to achieve high current densities and voltage tunability required for cross-point arrays while maintaining the basic diode structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The select device achieves higher current densities and voltage tunability, enhancing its performance in memory arrays and cell technologies, particularly in cross-point arrays, by modulating current flow and sustaining high current densities across a wide voltage range.
Implementation Method 1
enabling efficient charge transport mechanisms
Implementation Method 2
The structure has a first n-doped region, a p-doped region adjacent to the first n-doped region, and a second n-doped region adjacent to the p-doped region
Data Source
AI summary
Methods of forming and tuning a multilayer select device are provided, along with apparatus and systems which include them. As is broadly disclosed in the specification, one such method can include forming a first region having a first conductivity type; forming a second region having a second conductivity type and located adjacent to the first region; and forming a third region having the first conductivity type and located adjacent to the second region and, such that the first, second and third regions form a structure located between a first electrode and a second electrode, wherein each of the regions have a thickness configured to achieve a current density in a range from about 1×e4 amps/cm2 up to about 1×e8 amps/cm2 when a voltage in a selected voltage range is applied between the first electrode and the second electrode.