Multilayer Selector Device Low Holding Voltage
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Solution Overview
Problem
Conventional selector devices in non-volatile memory arrays suffer from high holding voltages, high threshold voltages, and poor leakage current, leading to power inefficiency and poor performance.
Innovation Solution
A multilayer selector device with a low holding voltage and low threshold voltage is developed, utilizing a metal filament and a solid electrolyte layer, which allows for efficient switching between conductive and non-conductive states, and is integrated into transistorless memory arrays and hybrid phase field effect transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional selector devices (chalcogenide glass, MIT material, or Mott transition material) are used in non-volatile memory arrays, then the devices can achieve switching functionality, but they exhibit high holding voltages, high threshold voltages, and poor leakage current, leading to power inefficiency
Solution Approach 1:
The patent changes the material parameters and structural configuration by introducing a multilayer architecture with specific thickness ratios (first layer thickness t1 and second layer thickness t2 where t1/t2 is within 0.5-2.0). This structural parameter optimization enables the selector device to achieve low holding voltage and low threshold voltage while maintaining acceptable leakage current characteristics, directly resolving the power efficiency contradiction.
Solution Approach 2:
The patent employs composite material structure by combining two different selector materials in a multilayer configuration. Each layer contributes different electrical characteristics, and their synergistic interaction enables the device to simultaneously achieve low holding voltage, low threshold voltage, and acceptable leakage current, thereby improving overall power efficiency while maintaining reliability.
2Reliability
If conventional selector devices are used, then switching functionality is achieved, but the holding voltage and threshold voltage are relatively high, leading to poor device performance
Solution Approach 1:
The patent optimizes structural parameters by controlling the thickness ratio between the first and second layers (t1/t2 within 0.5-2.0 range). This parameter optimization reduces the holding voltage and threshold voltage to acceptable levels while maintaining device performance, directly addressing the contradiction between low power and high performance.
Solution Approach 2:
The patent applies local quality by creating a non-uniform multilayer structure where each layer has specific thickness and material properties optimized for its local function. The first layer and second layer are designed with different characteristics that locally contribute to voltage reduction while maintaining overall device performance.
3Use of energy by moving object
If conventional selector devices are used, then basic switching functionality is provided, but the leakage current is poor, resulting in power inefficiency
Solution Approach 1:
The patent uses composite material structure with two different selector materials arranged in a multilayer configuration. The interaction between these materials creates a device that achieves both low leakage current and low operating voltages, resolving the contradiction between power efficiency and leakage current control.
Solution Approach 2:
The patent modifies the structural parameters by optimizing the thickness ratio of the two layers (t1/t2 within 0.5-2.0). This parameter change enables the device to achieve acceptable leakage current characteristics while maintaining low holding and threshold voltages, thereby improving power efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves a high Ion/Ioff ratio and improved device performance by reducing the holding and threshold voltages, enhancing write margin and power efficiency, while being compatible with magnetic tunnel junctions and other memory technologies.
Implementation Method 1
Ag ions from the metal layer form a conductive path in the SE layer when the top electrode is biased and disband the conductive path when the top electrode is not biased
Data Source
AI summary
An embodiment includes an apparatus comprising: a memory array comprising: a selector switch including top and bottom electrodes, a metal layer, and a solid electrolyte layer; a memory cell in series with the selector switch; bit and write lines, wherein (a) (i) the top electrode couples to one of the bit and write lines and the bottom electrode couples to another of the bit and write lines, and (a) (ii) the memory cell is between one of the top and bottom electrodes and one of the bit and write lines; wherein (b) (i) the metal layer includes silver (Ag), and (b) (ii) Ag ions from the metal layer form a conductive path in the SE layer when the top electrode is biased and disband the conductive path when the top electrode is not biased. Other embodiments Electrode are described herein.