Multilayer Semiconductor Device Metal Post Standoff

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Solution Overview

Problem

Conventional multilayer semiconductor devices face challenges in miniaturization and thickness reduction due to limitations in standoff height and chip size, leading to increased stress on metal connections and reduced reliability.

Innovation Solution

The implementation of metal posts on connection terminals provides a reliable standoff between packages, allowing for increased chip size and reduced thickness without compromising electrical connections, using a PoP structure with encapsulating resin that does not cover the metal posts, thereby reducing stress on metal connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If the thickness of the semiconductor chip and the height of the metal bumps are reduced to achieve miniaturization, then the device size is reduced, but the standoff height between packages is insufficient and stress on metal connections increases

Engineering Contradiction:
Improvedevice thicknessVSAvoidconnection reliability
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

Metal posts are introduced as intermediary structures between the interconnect substrate and the upper package. These posts provide additional mechanical support and electrical connection pathways, distributing the stress that would otherwise concentrate on the metal bumps. The posts extend through the encapsulating resin, creating a robust connection architecture that maintains reliability even when chip thickness and bump height are reduced for miniaturization.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention adds vertical dimensionality to the connection structure by introducing metal posts that extend through the encapsulating resin layer. This creates multiple connection levels and pathways, transforming a single-plane connection into a three-dimensional connection architecture. The posts provide standoff height and mechanical support without increasing the horizontal footprint, enabling miniaturization while maintaining connection reliability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If the outer size of the semiconductor chip is limited to allow underfill resin to cover connection terminals, then manufacturing is simplified, but chip size flexibility is reduced

Engineering Contradiction:
Improveunderfill application easeVSAvoidchip size flexibility
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The invention extracts the connection terminals from the region covered by underfill resin by positioning them on the interconnect substrate outside the semiconductor chip's outer perimeter. This separation allows the underfill to be applied freely without concern for covering terminals, while the metal posts provide the necessary electrical connections. The terminals remain accessible for bonding wire connections without interfering with the underfill application process.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Metal posts serve as intermediaries that provide electrical connections between the interconnect substrate and the upper package without requiring the underfill resin to cover the connection terminals. The posts extend through the encapsulating resin, creating reliable electrical pathways independent of the underfill's position, thereby enabling chip size flexibility while maintaining manufacturing simplicity.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If metal posts are added to provide standoff between packages, then connection reliability improves, but device complexity increases

Engineering Contradiction:
Improveconnection reliabilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The metal posts perform multiple functions simultaneously: they provide mechanical standoff between packages, serve as electrical connection pathways, and reinforce the structural integrity of the assembly. This multi-functionality reduces the need for separate components, as the posts integrate several critical functions into a single structural element, thereby improving reliability without proportionally increasing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The invention merges the functions of mechanical support, electrical connection, and structural reinforcement into the metal posts. By combining these functions into a single component rather than using separate elements, the design achieves improved connection reliability while minimizing the increase in device complexity. The posts are integrated into the existing package structure during the manufacturing process.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively increases chip size flexibility while maintaining reliable electrical connections and reducing the risk of damage to semiconductor chips and metal bumps, enhancing the design and performance of multilayer semiconductor devices.

Implementation Method 1

The liquid resin enters the entire space between the semiconductor chip 101 and the interconnect substrate 103 due to capillary action so that the underfill resin 106 fills the space between the semiconductor chip 101 and the interconnect substrate 103.

Methodology Applied
Scientific EffectCapillary action: Capillary Action

Implementation Method 2

Then, heat treatment is performed to cure the underfill resin 106, thereby encapsulating a circuit formation surface of the semiconductor chip 101 and the portions connected by the metal bumps 102.

Methodology Applied
Scientific EffectHeat treatment: Heat Treatment

Implementation Method 3

metal bumps 102, which are made of solder, and are mechanically and electrically connected to electrode terminals on a semiconductor chip 101

Methodology Applied
Scientific EffectSoldering: Soldering

Implementation Method 4

the solder is melted by reflowing the metal bumps 102 of the semiconductor chip 101 so that the semiconductor chip 101 is connected to the interconnect substrate 103 by the metal bumps 102

Methodology Applied
Scientific EffectReflow:

Data Source

PatentUS8269335B2Multilayer semiconductor device and electronic equipment
Publication Date: 2012.09.18 ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC
  • US8269335B2 patent drawing
  • US8269335B2 patent drawing
  • US8269335B2 patent drawing

AI summary

A multilayer semiconductor device includes an interconnect substrate provided with first electrode lands and connection terminals on a top surface; a semiconductor chip mounted on the top surface of the interconnect substrate; first connecting members connecting the first electrode lands to a circuit formation surface of the semiconductor chip; first metal posts provided on the connection terminals; encapsulating resin filling a space between the interconnect substrate and the semiconductor chip; a package provided with second electrode lands on a main surface; and second connecting members electrically connecting the first metal posts to the second electrode lands.