Multilayer Solder Resist Circuit Board Warpage Control

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Solution Overview

Problem

Conventional circuit boards with fine circuit patterns face reliability issues due to protrusion on the insulating layer, leading to potential collapse and increased warpage, especially in high-frequency applications like 5G communication systems, where low loss and compact integration are critical.

Innovation Solution

A circuit board structure featuring a multilayer solder resist system with different material properties and filler contents, where the first solder resist has a lower coefficient of thermal expansion and higher filler content than the second, providing support and minimizing warpage, and using an exposure and development method for resist removal to maintain pattern integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the circuit pattern is made finer to increase circuit integration, then the circuit line width is reduced, but the outermost circuit pattern becomes prone to collapse

Engineering Contradiction:
Improvecircuit line widthVSAvoidcircuit pattern stability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The solder resist is divided into multiple layers (first solder resist and second solder resist) with different heights. The first solder resist has a first height that exposes the circuit pattern, while the second solder resist has a second height that covers and supports the circuit pattern. This segmentation allows the circuit pattern to be both accessible and protected, preventing collapse while maintaining fine line width.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The solution moves from a two-dimensional planar structure to a three-dimensional multi-layer structure. By creating solder resist layers with different heights (first height and second height), the circuit pattern gains vertical support without increasing its horizontal footprint, thus preventing collapse while maintaining fine circuit dimensions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Weight of moving object

If the circuit board is made lighter and thinner for compact integration, then the overall size is reduced, but warpage of the circuit board increases

Engineering Contradiction:
Improvecircuit board weightVSAvoidcircuit board warpage
Core Design Contradiction:
Weight of moving objectVSStability of the object's composition

Solution Approach 1:

The solder resist layers are designed with specific height parameters (first height and second height) and material properties (different filler contents). The first solder resist has higher filler content for rigidity, while the second has lower filler content for flexibility. This parameter optimization allows compact board design while controlling warpage through balanced mechanical properties.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If a single-layer solder resist is used to support the circuit pattern, then the structure is simple, but it cannot effectively prevent collapse and warpage

Engineering Contradiction:
Improvesolder resist structureVSAvoidcircuit pattern support
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The solder resist is segmented into multiple functional layers: the first solder resist layer provides base support and exposure, while the second solder resist layer provides additional coverage and stabilization. This segmentation enables the structure to simultaneously achieve simplicity in concept while delivering enhanced reliability through layered functionality.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11778741B2Circuit board
Publication Date: 2023.10.03 LG INNOTEK CO LTD
  • US11778741B2 patent drawing
  • US11778741B2 patent drawing
  • US11778741B2 patent drawing

AI summary

A circuit board according to an embodiment includes an insulating layer; a circuit pattern disposed on an upper surface of the insulating layer; a first solder resist disposed on an upper surface of the insulating layer and having a height smaller than a height of the circuit pattern; and a second solder resist disposed on an upper surface of the first solder resist and including a first portion having an upper surface lower than an upper surface of the circuit pattern and a second portion having an upper surface higher than the upper surface of the circuit pattern, wherein the circuit pattern includes: a plurality of first circuit patterns disposed on an upper surface of a first region of the insulating layer, and a plurality of second circuit patterns disposed on an upper surface of a second region of the insulating layer; wherein the first portion of the second solder resist is disposed between the plurality of first circuit patterns to have an upper surface lower than an upper surface of the first circuit pattern; and wherein the second portion of the second solder resist has an upper surface higher than an upper surface of the second circuit pattern, and is disposed to cover the plurality of second circuit patterns between the plurality of second circuit patterns.