Multilayer Spiral Impedance Matching Circuit for Compact Power Amplifiers
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Solution Overview
Problem
Existing impedance matching circuits for power amplifiers in mobile devices are large due to the need for long transmission lines, making them difficult to miniaturize while maintaining high performance.
Innovation Solution
A multilayer substrate-based impedance matching circuit with a microstrip line, spiral inductors, and capacitors arranged in a compact spiral structure, where the microstrip line and spiral inductors are connected across multiple layers, and capacitors are placed outside the spiral inductor to reduce size without compromising performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a transmission line is implemented on a single layer substrate to realize necessary inductance, then the inductance function is achieved, but the transmission line length becomes long and the circuit area increases
Solution Approach 1:
The patent transitions from a planar single-layer transmission line to a three-dimensional multilayer spiral structure. The spiral inductor is formed across multiple substrate layers, utilizing vertical stacking to achieve compact inductance realization. This dimensional change allows the inductor to occupy significantly less area while maintaining the required inductance value, directly resolving the contradiction between inductance function and circuit area.
Solution Approach 2:
The patent embeds multiple transmission line segments within different substrate layers, with each layer containing a portion of the spiral structure. The inductor is nested across layers 1 through 4, with via holes connecting corresponding segments. This nesting approach concentrates the inductance function into a compact vertical structure, eliminating the need for long planar transmission lines and reducing overall circuit area.
2Area of stationary object
If capacitors are placed close to the spiral inductor to save area, then area is reduced, but the Q value of the inductor deteriorates due to parasitic coupling
Solution Approach 1:
The patent extracts the capacitors from the immediate vicinity of the spiral inductor and places them on opposite sides of the inductor structure. Specifically, capacitors are positioned at locations远离 the spiral center, minimizing parasitic coupling between the capacitors and the inductor. This extraction maintains area efficiency while preserving the high Q value by eliminating harmful electromagnetic interference.
3Device complexity
If the reference ground is disposed on the lowermost layer to simplify structure, then structural complexity is reduced, but the microstrip line characteristic impedance increases
Solution Approach 1:
The patent moves the reference ground from the lowermost layer to an intermediate layer (layer 2), utilizing the vertical dimension to optimize impedance characteristics. This intermediate ground placement reduces the distance between the microstrip line and its reference potential, thereby lowering characteristic impedance to desired levels. The multilayer configuration allows this impedance optimization without significantly increasing overall structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves a compact size while maintaining high performance, with the multilayer spiral inductor structure and parallel capacitors providing effective impedance matching and improved Q value, resulting in reduced loss and efficient power amplification.
Implementation Method 1
a spiral inductor comprising a first spiral transmission line may be disposed on the first layer substrate and connected to the microstrip line, a second spiral transmission line may be disposed on a substrate layer below the first layer substrate and connected to the first spiral transmission line
Implementation Method 2
a first capacitor circuit may be disposed outside the spiral inductor and connected between the microstrip line and a ground; and a second capacitor circuit may be disposed outside the spiral inductor and connected between the output pad and the ground
Data Source
AI summary
An impedance matching circuit, includes a multilayer substrate, a microstrip line, a spiral inductor, a first capacitor circuit, and a second capacitor circuit. The multilayer substrate includes a power amplifier, and the microstrip line is disposed on a first layer substrate and connected to the power amplifier. The spiral inductor includes a first spiral transmission line disposed on the first layer substrate and connected to the microstrip line, a second spiral transmission line disposed on a substrate layer below the first layer substrate and connected to the first spiral transmission line, and an output pad disposed on the first layer substrate and connected to the second spiral transmission line. The first capacitor circuit is disposed outside the spiral inductor and connected between the microstrip line and a ground. The second capacitor circuit is disposed outside the spiral inductor and connected between the output pad and the ground.