Multi-Layer Stack Patterning Without Metal Etch Residue
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Solution Overview
Problem
Current semiconductor device fabrication techniques face challenges in forming complex multi-layer stacks for 3D NAND structures, particularly in etching trenches and recessing sidewalls without metal residue and maintaining feature profile integrity, due to varying etch rates and chemistries of different materials.
Innovation Solution
A method involving a metal-free multi-layer stack with a sacrificial layer is used, where the sacrificial layer is selectively etched to create spaces, and metal is subsequently deposited, allowing for high aspect ratio patterning and vertical scaling without etching metal, thereby avoiding metal residue and improving profile control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal is included in the multi-layer stack during etching, then the stack can be fabricated with conducting materials, but metal residue is generated and feature profile integrity deteriorates
Solution Approach 1:
The patent applies preliminary action by depositing the metal layer after the etching process rather than including it during etching. The metal-free multi-layer stack is first etched to form the desired pattern, and then metal is deposited into the formed structures. This sequence prevents metal residue generation while maintaining feature profile integrity, as the metal is introduced only after the etching chemistry has completed its work on the dielectric and semiconductor layers.
2Adaptability or versatility
If complex multi-layer stacks with varying materials are etched, then conducting and dielectric materials can be integrated, but etch rate variation increases and manufacturing precision deteriorates
Solution Approach 1:
The patent segments the multi-layer stack into metal-free regions (dielectric and semiconductor layers) that are etched with controlled precision, and metal regions that are deposited afterward. By separating the etching process from the metal-containing layers, the patent achieves precise etch rate control for the etchable materials while still integrating conducting materials into the final structure through subsequent metal deposition into the formed patterns.
3Productivity
If metal is etched along with other materials, then the multi-layer stack can be processed in fewer steps, but etch chemistry complexity increases and manufacturing precision deteriorates
Solution Approach 1:
The patent performs the etching action preliminarily on a metal-free stack before metal deposition. This approach maintains high productivity by using a simplified etch chemistry that only needs to handle dielectric and semiconductor materials, achieving better etch profile control. The metal is then added in a separate deposition step, avoiding the need for complex multi-material etch chemistries while still processing the complete multi-layer structure efficiently.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of 3D NAND structures with improved feature integrity and reduced risk of metal residue, facilitating the fabrication of complex multi-layer stacks with precise profile control.
Implementation Method 1
selectively etching the sacrificial layer relative to other materials of the metal-free multi-layer stack to form at least one space between layers
Implementation Method 2
depositing metal in the at least one space to form a metal-containing multi-layer stack
Implementation Method 3
depositing metal in the at least one space to form a metal-containing multi-layer stack
Data Source
AI summary
Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.